26.10.2012 Views

Statement List (STL) - DCE FEL ČVUT v Praze

Statement List (STL) - DCE FEL ČVUT v Praze

Statement List (STL) - DCE FEL ČVUT v Praze

SHOW MORE
SHOW LESS

You also want an ePaper? Increase the reach of your titles

YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.

Bit Logic Instructions<br />

1.9 A( And with Nesting Open<br />

Description<br />

Format<br />

A(<br />

Status word<br />

Example<br />

A( (AND nesting open) saves the RLO and OR bits and a function code into the<br />

nesting stack. A maximum of seven nesting stack entries are possible.<br />

BR CC 1 CC 0 OV OS OR STA RLO /FC<br />

writes: - - - - - 0 1 - 0<br />

<strong>Statement</strong> <strong>List</strong> Program<br />

A(<br />

O I 0.0<br />

O M 10.0<br />

)<br />

A(<br />

O I 0.2<br />

O M 10.3<br />

)<br />

= Q 4.0<br />

Power rail<br />

Q 4.0<br />

Coil<br />

<strong>Statement</strong> <strong>List</strong> (<strong>STL</strong>) for S7-300 and S7-400 Programming<br />

1-10 A5E00706960-01<br />

I 0.0<br />

I 0.2<br />

A M 10.1 M 10.1<br />

Relay Logic<br />

M 10.0<br />

M10.3

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!