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BSP Developer's Guide

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5<br />

Driver <strong>Guide</strong>lines<br />

block are more important than those in the code body. They will help others to<br />

study the design without having to read the code bodies.<br />

Bottom-Up Implementation<br />

■<br />

■<br />

■<br />

■<br />

After planning the driver and laying out its skeleton of functions and data<br />

structures, you are ready to implement and test.<br />

Write the Code<br />

Start with device initialization. Write the code to accept a device structure and<br />

initialize it for use. Fill in the bodies to all the other low-level driver functions.<br />

You could do a test compile to check that all the necessary routines are<br />

declared. Examine the symbols in the object module to verify that only the<br />

desired external routines are unresolved.<br />

Test, Debug, Recompile<br />

The usual test, fix, and recompile cycle. Personal preferences guide this phase.<br />

Some code and test one routine at a time.<br />

Work One Layer at a Time<br />

Repeat the write, test, debug, recompile cycle for each layer of code. Thorough<br />

testing of each layer gives confidence in the project. Trying to write all the code<br />

at once can be unmanageable.<br />

Performance Testing<br />

Some set of benchmark tests should be used to verify that the device meets the<br />

usual customers expectations. A wide SCSI device that can only deliver<br />

5 MB/s net throughput is not going to please the customer very much. It might<br />

be necessary for the engineer to write a complete performance benchmark test<br />

as part of the overall project.<br />

5<br />

5.6 Cache Considerations<br />

The VxWorks cache library (cacheLib) was designed to hide architecture and<br />

target details from the rest of the system and to provide mechanisms to maintain<br />

cache coherency. Cache coherency means data in the cache must be in sync (or<br />

coherent) with that in RAM.<br />

101

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