BSP Developer's Guide

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VxWorks 5.5 BSP Developer’s Guide 4.4.3 Auxiliary Clock .................................................................................. 79 4.4.4 Timestamp Clocks ............................................................................. 79 4.4.5 Serial Ports .......................................................................................... 79 4.4.6 Ethernet Controllers .......................................................................... 80 4.4.7 SCSI Controllers ................................................................................. 81 4.4.8 DMA Controllers ............................................................................... 82 4.4.9 Reset Button ........................................................................................ 82 4.4.10 Abort Button ....................................................................................... 82 4.4.11 DIP Switches ....................................................................................... 82 4.4.12 User LEDs ........................................................................................... 82 4.4.13 Parallel Ports ...................................................................................... 83 4.5 Enabling the Virtual Memory Library .......................................................... 83 4.5.1 Changes to sysLib.c ........................................................................... 83 4.5.2 Changes to config.h ........................................................................... 85 4.5.3 Additional Requirements for SPARC Targets ................................ 85 Sun-4 MMU ........................................................................................ 85 SPARC Reference MMU ................................................................... 86 5 Driver Guidelines ...................................................................................................... 89 5.1 Introduction ...................................................................................................... 89 5.2 Design Goals ..................................................................................................... 90 Designing for Performance .............................................................. 90 Code Flexibility/Portability ............................................................. 90 Maintenance and Readability .......................................................... 91 Ease of Configuration ....................................................................... 91 Performance Testing .......................................................................... 91 Code Size ............................................................................................ 91 Reentrancy .......................................................................................... 91 5.3 Design Problems .............................................................................................. 92 Hardware Designs of All Types ....................................................... 92 viii
Contents Memory-Mapped Chips ................................................................... 92 I/O-Mapped Chips ............................................................................ 93 Multi-Function Chips ........................................................................ 93 Multiple Buses .................................................................................... 94 Interrupt Controllers ......................................................................... 94 5.4 Design Guidelines ............................................................................................ 95 Names and Locations ........................................................................ 95 Documentation and Standards ........................................................ 96 Per-Device Data Structure ................................................................ 97 Per-Driver Data Structure ................................................................. 97 Driver Interrupt Service Routines ................................................... 97 Access Macros .................................................................................... 98 5.5 Step by Step ....................................................................................................... 100 5.6 Cache Considerations ...................................................................................... 101 5.7 Helpful Hints .................................................................................................... 102 5.8 Driver Use of the Cache Library .................................................................... 103 5.8.1 Review of cacheLib Facilities ........................................................... 103 5.8.2 Conducting Driver Analysis ............................................................ 103 Shared Memory Types ....................................................................... 104 Driver Attributes ................................................................................ 105 5.8.3 Developing the cacheLib Strategy ................................................... 106 Flush and Invalidate Macros ............................................................ 107 WRITE_PIPING Attribute ................................................................ 107 SNOOPED Attribute ......................................................................... 108 MMU_TAGGING Attribute ............................................................. 108 USER_DATA_UNKNOWN Attribute ............................................ 108 DEVICE_WRITES_ASYNCHRONOUSLY Attribute ................... 109 SHARED_CACHE_LINES Attribute .............................................. 109 DEVICE_WRITES_ASYNCHRONOUSLY and SHARED_CACHE_LINES Attributes .............................. 109 SHARED_POINTERS Attribute ...................................................... 110 5.8.4 Additional Cache Library Hints ...................................................... 110 ix
Page 1 and 2: VxWorks® 5.5 BSP DEVELOPER’S GUI
Page 3 and 4: 1 Overview ........................
Page 5 and 6: Contents 1 Overview ...............
Page 7: Contents 3.6.5 Cache, MMU, and DMA
Page 11 and 12: Contents 7.3.3 System Configuration
Page 13 and 14: Contents 9.5.4 Processing .........
Page 15 and 16: Contents F Generic Drivers ........
Page 17 and 18: Contents Stopping the Driver Withou
Page 19 and 20: 1 Overview 1.1 Introduction One str
Page 21 and 22: 1 Overview ■ New Drivers Many new
Page 23 and 24: 1 Overview Included with Tornado (n
Page 25 and 26: 1 Overview ■ ■ ■ ■ ■ ■
Page 27 and 28: 1 Overview Table 1-1 Font Usage for
Page 29 and 30: 2 BSP Organization 2.1 Introduction
Page 31 and 32: 2 BSP Organization Files in the tar
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Page 35 and 36: 2 BSP Organization Version 1.0 BSPs
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3 Creating a New BSP 3.1 Introducti
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3 Creating a New BSP 3.2 Setting Up
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3 Creating a New BSP Makefile At a
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3 Creating a New BSP char * sysBspR
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3 Creating a New BSP ... #endif } T
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3 Creating a New BSP int dummy; ...
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3 Creating a New BSP To find the so
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3 Creating a New BSP might want to
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3 Creating a New BSP not, use the s
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3 Creating a New BSP ■ It has a V
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3 Creating a New BSP 3.6.7 SCSI VxW
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4 Hardware Guidelines 4.1 Introduct
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4 Hardware Guidelines to the start
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4 Hardware Guidelines Higher-level
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4 Hardware Guidelines Such dedicate
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4 Hardware Guidelines Especially us
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4 Hardware Guidelines selected from
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4 Hardware Guidelines Hardware Inte
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4 Hardware Guidelines The rest of t
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4 Hardware Guidelines 4.4.2 System
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4 Hardware Guidelines only deal wit
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4 Hardware Guidelines 4.4.13 Parall
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4 Hardware Guidelines 0x10000, /* 6
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4 Hardware Guidelines The following
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5 Driver Guidelines 5.1 Introductio
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5 Driver Guidelines Maintenance and
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5 Driver Guidelines word addresses.
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5 Driver Guidelines 5.4 Design Guid
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5 Driver Guidelines Per-Device Data
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5 Driver Guidelines To fix this sit
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5 Driver Guidelines block are more
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5 Driver Guidelines 5.8 Driver Use
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5 Driver Guidelines ■ ■ Memory
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5 Driver Guidelines The level of ca
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5 Driver Guidelines cache for the d
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6 Components 6.1 Introduction Torna
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6 Components 6.2 Component Descript
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6 Components ■ User Presentation.
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6 Components Folder FOLDER_ANSI { N
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6 Components in a single project. I
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6 Components The component object i
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6 Components Parameters Parameters
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6 Components In the example, the co
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6 Components (2) comps/vxWorks/arch
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6 Components Figure 6-4 Include Com
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6 Components NOTE: INIT_BEFORE only
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6 Components The _CHILDREN property
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6 Components ! CAUTION: Do not alte
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6 Components ■ Check the Project
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7 Validation Testing 7.1 Introducti
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7 Validation Testing ■ ■ The te
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7 Validation Testing 2. The script
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7 Validation Testing Figure 7-4 Typ
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7 Validation Testing NOTE: Wind Riv
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7 Validation Testing scsi Requires
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7 Validation Testing Table 7-1 Vali
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7 Validation Testing Table 7-2 Vali
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7 Validation Testing sysProcNumGet
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7 Validation Testing The log file c
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8 Writing Portable C Code This chap
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8 Writing Portable C Code attribute
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8 Writing Portable C Code 8.1.3 Sta
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8 Writing Portable C Code 8.1.5 Oth
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8 Writing Portable C Code The last
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8 Writing Portable C Code Always sp
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8 Writing Portable C Code 8.2 Tool
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9 Documentation Guidelines 9.1 Intr
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9 Documentation Guidelines Spelling
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9 Documentation Guidelines Table 9-
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9 Documentation Guidelines Table 9-
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9 Documentation Guidelines ■ Avoi
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9 Documentation Guidelines ■ ■
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9 Documentation Guidelines INCLUDE
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9 Documentation Guidelines INTRODUC
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9 Documentation Guidelines 9.5 Gene
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9 Documentation Guidelines uppercas
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9 Documentation Guidelines The foll
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10 Product Packaging 10.1 SETUP Dev
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10 Product Packaging ... include $(
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10 Product Packaging Vendor-Supplie
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10 Product Packaging in the project
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A Upgrading a BSP for Tornado 2.0 T
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A Upgrading a BSP for Tornado 2.0 A
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A Upgrading a BSP for Tornado 2.0
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A Upgrading a BSP for Tornado 2.0 6
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B Upgrading a BSP for Tornado 2.2 T
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B Upgrading a BSP for Tornado 2.2 C
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B Upgrading a BSP for Tornado 2.2
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B Upgrading a BSP for Tornado 2.2 c
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B Upgrading a BSP for Tornado 2.2
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C Upgrading a BSP for the VxWorks N
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D VxWorks Boot Sequence Table D-1 d
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D VxWorks Boot Sequence Table D-1 V
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E Component Language E.1 Component
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E Component Language REQUIRES r1 r2
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E Component Language } // default i
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E Component Language FOLDER_WINDVIE
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E Component Language initialization
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E Component Language INCLUDE_MMU_BA
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E Component Language INCLUDE_NETWOR
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E Component Language INCLUDE_WDB_ME
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F Generic Drivers F.1 Introduction
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F Generic Drivers CONSOLE_TTY This
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F Generic Drivers Define SIO_CALLBA
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F Generic Drivers NV_RAM_SIZE Defin
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F Generic Drivers F.10 PCI Bus The
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G Upgrading 4.3 BSD Network Drivers
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H Implementing a MUX-Based Network
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I Writing a SCSI-2 Device Driver I.
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I Writing a SCSI-2 Device Driver SC
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I Writing a SCSI-2 Device Driver Fo
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I Writing a SCSI-2 Device Driver On
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I Writing a SCSI-2 Device Driver A
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I Writing a SCSI-2 Device Driver /*
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I Writing a SCSI-2 Device Driver */
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I Writing a SCSI-2 Device Driver *
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I Writing a SCSI-2 Device Driver Th
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I Writing a SCSI-2 Device Driver #i
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I Writing a SCSI-2 Device Driver */
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I Writing a SCSI-2 Device Driver ;
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I Writing a SCSI-2 Device Driver ;/
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I Writing a SCSI-2 Device Driver re
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I Writing a SCSI-2 Device Driver Th
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J BSP Validation Test Suite Referen
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K BSP Validation Checklists This ap
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K BSP Validation Checklists BSP Val
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K BSP Validation Checklists 7. Veri
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K BSP Validation Checklists 2. If t
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K BSP Validation Checklists Validat
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K BSP Validation Checklists Manufac
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K BSP Validation Checklists Manufac
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L Refgen NOTE: In Tornado 1.0.1 and
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L Refgen * SYNOPSIS * \cs * void xx
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L Refgen Yields output approximatel
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L Refgen EXAMPLE INCLUDES SEE ALSO
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M BSP Product Contents When you are
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M BSP Product Contents Do not inclu
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Index A abort button 82 addressing
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Index clocks see also individual cl
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Index naming conventions 95 perform
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Index INCLUDE_USR_APPL 38 INCLUDE_V
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Index network drivers 58 network in
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Index scsiCtrlLib 324 scsiDirectLib
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Index testing, validation 139-158 s
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