BSP Developer's Guide

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VxWorks 5.5 BSP Developer’s Guide B.2.4 ColdFire In addition to the steps described in B.2.1 Migration Changes Common to All Architectures, p.214, the following ColdFire-specific issues should be considered when migrating your custom BSP: ■ Diab support. This release of VxWorks for ColdFire includes the same basic layout and functionality included with the previous Tornado 2.1/VxWorks 5.4 release. However, the GNU toolchain is no longer supported. For more information on using VxWorks with ColdFire targets, see the VxWorks for ColdFire Architecture Supplement. B.2.5 MIPS NOTE: This section describes BSP migration from Tornado 2.1\VxWorks 5.4 to Tornado 2.2\VxWorks 5.5. For information on migrating a BSP from Tornado 2.0.x to Tornado 2.1, see the Tornado for MIPS Release Notes and Architecture Supplement manual available on WindSurf. In addition to the steps described in B.2.1 Migration Changes Common to All Architectures, p.214, the following MIPS-specific issues should be considered when migrating your custom BSP to Tornado 2.2/VxWorks 5.5: ■ CPU variants. MIPS CPUs are now organized by CPU variant. This allows the VxWorks kernel to take advantage of the specific architecture characteristics of one variant without negatively impacting another. As a result, all MIPS BSPs must now include a CPU_VARIANT line in the Makefile after the MACH_EXTRA line. For example, CPUs which fall into the category of Vr54xx variants, use the following line: CPU_VARIANT =_vr54xx ■ ■ See the VxWorks for MIPS Architecture Supplement for a list of MIPS CPUs and their respective CPU_VARIANT values. MIPS64 Libraries. The MIPS64 libraries (MIPS64gnu, MIPS64diab, MIPS64gnule, and MIPS64diable) now support 64-bit MIPS devices with ISA Level III and above. In previous versions of VxWorks, these libraries only supported MIPS devices with ISA Level IV and above. For more information on compiler options for MIPS libraries, refer to the Architecture Supplement. Alchemy Semiconductor BSPs. The Alchemy Semiconductor BSP, pb1000, has been altered to provide additional support to the pb1500 BSP. As a result, some 216
B Upgrading a BSP for Tornado 2.2 changes have been made to the API of the common support for these two BSPs. All macro, driver, and file names previously using au1000 have been changed to simply au. For example, the cache library cacheAu1000Lib is now known as cacheAuLib. For more details on these changes, refer to the BSP and its supporting drivers. For more information on using VxWorks with MIPS targets, see the VxWorks for MIPS Architecture Supplement. B.2.6 Pentium In addition to the steps described in B.2.1 Migration Changes Common to All Architectures, p.214, the following Pentium-specific issues should be considered when migrating your custom BSP to Tornado 2.2/VxWorks 5.5: ■ ■ ■ ■ ■ ■ ■ The new CPU types PENTIUM2, PENTIUM3, and PENTIUM4 have been added and CPU_VARIANT has been removed. Thus, CPU_VARIANT should be replaced with a new CPU type that is appropriate for your processor. Three new code selectors, sysCsSuper, sysCsExc, and sysCsInt, have been added for this release, and sysCodeSelector has been removed. In existing BSPs, sysCodeSelector should be replaced with sysCsSuper. The ROM_IDTR, ROM_GDTR, ROM_GDT, ROM_INIT2 offset macros have been removed due to improvements in the GNU assembler (GAS). These macros are no longer used by romInit.s. For assembly files only: the new macros GTEXT, GDATA, FUNC, and FUNC_LABEL have been added to assist in porting assembly files. The leading underscores in global assembly label names should be removed. Using these macros allows source compatibility between Tornado 2.0.2 and Tornado 2.2. For assembly files only: replace .align with .balign. The PC host utility mkboot now works with known VxWorks names, but may not work with user-provided names unless they are of type binary (*.bin). For all other images, there are two options: ■ ■ Rename your image to bootrom.dat before running mkboot. Modify mkboot.dat to support your names. Follow the examples given in the mkboot.bat file. Power management is enabled by default. To disable it, modify config.h: B #undef VX_POWER_MANAGEMENT 217
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VxWorks® 5.5 BSP DEVELOPER’S GUI
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1 Overview ........................
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Contents 1 Overview ...............
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Contents 3.6.5 Cache, MMU, and DMA
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Contents Memory-Mapped Chips ......
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Contents 7.3.3 System Configuration
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Contents 9.5.4 Processing .........
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Contents F Generic Drivers ........
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Contents Stopping the Driver Withou
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1 Overview 1.1 Introduction One str
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1 Overview ■ New Drivers Many new
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1 Overview Included with Tornado (n
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1 Overview ■ ■ ■ ■ ■ ■
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1 Overview Table 1-1 Font Usage for
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2 BSP Organization 2.1 Introduction
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2 BSP Organization Files in the tar
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2 BSP Organization Files in the tar
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2 BSP Organization Version 1.0 BSPs
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2 BSP Organization SM_MEM_SIZE The
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2 BSP Organization For boards witho
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2 BSP Organization PCI_MSTR_IO_LOCA
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2 BSP Organization The entry point
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2 BSP Organization target.nr The fi
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2 BSP Organization bootrom This fil
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2 BSP Organization sysSerialHwInit(
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2 BSP Organization The Motorola M68
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2 BSP Organization Many VxWorks fac
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2 BSP Organization further board in
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2 BSP Organization can have very un
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3 Creating a New BSP 3.1 Introducti
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3 Creating a New BSP 3.2 Setting Up
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3 Creating a New BSP Makefile At a
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3 Creating a New BSP char * sysBspR
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3 Creating a New BSP ... #endif } T
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3 Creating a New BSP int dummy; ...
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3 Creating a New BSP To find the so
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3 Creating a New BSP might want to
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3 Creating a New BSP not, use the s
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3 Creating a New BSP ■ It has a V
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3 Creating a New BSP 3.6.7 SCSI VxW
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4 Hardware Guidelines 4.1 Introduct
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4 Hardware Guidelines to the start
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4 Hardware Guidelines Higher-level
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4 Hardware Guidelines Such dedicate
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4 Hardware Guidelines Especially us
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4 Hardware Guidelines selected from
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4 Hardware Guidelines Hardware Inte
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4 Hardware Guidelines The rest of t
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4 Hardware Guidelines 4.4.2 System
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4 Hardware Guidelines only deal wit
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4 Hardware Guidelines 4.4.13 Parall
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4 Hardware Guidelines 0x10000, /* 6
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4 Hardware Guidelines The following
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5 Driver Guidelines 5.1 Introductio
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5 Driver Guidelines Maintenance and
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5 Driver Guidelines word addresses.
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5 Driver Guidelines 5.4 Design Guid
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5 Driver Guidelines Per-Device Data
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5 Driver Guidelines To fix this sit
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5 Driver Guidelines block are more
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5 Driver Guidelines 5.8 Driver Use
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5 Driver Guidelines ■ ■ Memory
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5 Driver Guidelines The level of ca
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5 Driver Guidelines cache for the d
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6 Components 6.1 Introduction Torna
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6 Components 6.2 Component Descript
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6 Components ■ User Presentation.
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6 Components Folder FOLDER_ANSI { N
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6 Components in a single project. I
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6 Components The component object i
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6 Components Parameters Parameters
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6 Components In the example, the co
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6 Components (2) comps/vxWorks/arch
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6 Components Figure 6-4 Include Com
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6 Components NOTE: INIT_BEFORE only
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6 Components The _CHILDREN property
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6 Components ! CAUTION: Do not alte
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6 Components ■ Check the Project
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7 Validation Testing 7.1 Introducti
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7 Validation Testing ■ ■ The te
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7 Validation Testing 2. The script
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7 Validation Testing Figure 7-4 Typ
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7 Validation Testing NOTE: Wind Riv
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7 Validation Testing scsi Requires
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7 Validation Testing Table 7-1 Vali
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7 Validation Testing Table 7-2 Vali
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7 Validation Testing sysProcNumGet
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7 Validation Testing The log file c
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8 Writing Portable C Code This chap
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8 Writing Portable C Code attribute
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8 Writing Portable C Code 8.1.3 Sta
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Page 265 and 266: F Generic Drivers F.1 Introduction
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H Implementing a MUX-Based Network
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I Writing a SCSI-2 Device Driver I.
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J BSP Validation Test Suite Referen
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K BSP Validation Checklists BSP Val
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K BSP Validation Checklists 7. Veri
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K BSP Validation Checklists 2. If t
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K BSP Validation Checklists Validat
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K BSP Validation Checklists Manufac
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K BSP Validation Checklists Manufac
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L Refgen NOTE: In Tornado 1.0.1 and
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L Refgen * SYNOPSIS * \cs * void xx
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L Refgen Yields output approximatel
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L Refgen EXAMPLE INCLUDES SEE ALSO
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M BSP Product Contents When you are
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M BSP Product Contents Do not inclu
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Index A abort button 82 addressing
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Index clocks see also individual cl
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Index naming conventions 95 perform
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Index INCLUDE_USR_APPL 38 INCLUDE_V
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Index network drivers 58 network in
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Index scsiCtrlLib 324 scsiDirectLib
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Index testing, validation 139-158 s
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