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BSP Developer's Guide

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VxWorks 5.5<br />

<strong>BSP</strong> Developer’s <strong>Guide</strong><br />

I.8 Troubleshooting and Debugging<br />

This section provides several suggestions for troubleshooting techniques and<br />

debugging shortcuts.<br />

SCSI Cables and Termination<br />

A poor cable connection or poor SCSI termination is one of the most common<br />

sources of erratic behavior, of the VxWorks target hanging during SCSI execution,<br />

and even of unknown interrupts. The SCSI bus must be terminated at both ends,<br />

but make sure that no device in the middle of the daisy chain has pull-up<br />

terminator resistors or some other form of termination.<br />

SCSI Library Configuration<br />

Check to see that the test does not exceed the memory constraints within the<br />

library, such as the permitted number of SCSI threads, the size of the ring buffers,<br />

and the stack size of the SCSI manager. In most cases, the default values are<br />

appropriate.<br />

Data Coherency Problems<br />

Data coherency problems usually occur in hardware environments where the CPU<br />

supports data caching. First disable the data caches and verify that data corruption<br />

is occurring. If the problem disappears with the caches disabled, then the<br />

coherency problem is related to caches. (Caches can usually be turned off in the<br />

<strong>BSP</strong> by #undef USER_D_CACHE_ENABLE.) In order to further troubleshoot the<br />

data cache coherency problem, use cacheDmaMalloc( ) in the driver for all<br />

memory allocations. However, if hardware snooping is enabled then the problem<br />

may lie elsewhere.<br />

Data Address in Virtual Memory Environments<br />

If the CPU board has a Memory Management Unit (MMU), then the driver<br />

developer has to be careful when setting data address pointers during Direct<br />

Memory Access (DMA) transfers. When DMA is used in this environment, the<br />

physical memory address must be used instead of the virtual memory address.<br />

This is because during DMA transfers from the SCSI bus, the SCSI or DMA<br />

controller is the bus master and therefore the MMU on the CPU cannot translate<br />

the virtual address to the physical address. Instead, the macro<br />

CACHE_DMA_VIRT_TO_PHYS must be used when providing the data address to<br />

the DMA controller.<br />

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