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BSP Developer's Guide

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2<br />

<strong>BSP</strong> Organization<br />

The Motorola M68040 must be put in a transparent memory-mapping mode.<br />

The Motorola M683xx family is a special case. These processors run on busless<br />

boards that communicate with the outside world via serial lines; for this reason,<br />

the boot ROMs contain an embedded standalone VxWorks shell<br />

(vxWorks.st_rom.hex). This type of configuration may become more prevalent in<br />

future busless systems.<br />

2<br />

2.3.2 Sequence Overview<br />

The processor is first “jumped” to the entry point in ROM, which sets the status<br />

word and creates a dummy stack; then it jumps toaCroutine. A parameter on the<br />

dummy stack determines whether to clear memory (cold start), and then copies the<br />

rest of ROM into RAM (if the remainder of the ROM is compressed, then it is<br />

uncompressed during the copy). Next, the processor jumps to the entry point in<br />

RAM. 2<br />

The RAM entry point in bootConfig.c disables the cache, clears the bss segment to<br />

zero, initializes the vector table, performs board specific initialization, and then<br />

starts the multitasking kernel with a user booting task as its only activity.<br />

The VxWorks boot ROM image is a standalone application in its own right. The<br />

developer uses it to boot a new VxWorks image over the network and link in<br />

application code. The boot ROM’s kernel is discarded; there is no trap mechanism<br />

or reuse of this code. The application is linked with a new image built on the host.<br />

2.3.3 Files and Routines<br />

This section contains a more detailed explanation of how booting takes place,<br />

organized by file and routine name. For clarity, the sequence has been broken<br />

down into a number of main steps or function calls. The key functions are listed as<br />

headings and shown in invocation order.<br />

romInit.s: romInit( )<br />

At power-up (cold start) the processor begins execution at romInit( ), always the<br />

first routine in romInit.s. For warm starts, the processor begins execution at<br />

2. The reason for executing the text segment from RAM is partly for speed (although it is not<br />

faster in all situations), and to allow a uniform model for uncompression, which may be<br />

insufficient reason for an application to retain this model, especially at the cost of wasted<br />

RAM. Either way, the data segment and bss (uninitialized data) must be in RAM.<br />

33

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