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BSP Developer's Guide

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J<br />

<strong>BSP</strong> Validation Test Suite Reference Entries<br />

Tests 1 through 4 check the accuracy of the auxiliary clock at several frequencies: an<br />

optional extra rate, minimum, maximum, and the default rate, respectively. To measure<br />

the rate of the auxiliary clock, a simple callback routine is connected to the auxiliary clock<br />

ISR using sysAuxClkConnect( ). This callback routine increments a counter on every<br />

clock tick. The counter is then cleared, and the auxiliary clock is enabled at the rate being<br />

tested. The counter is read after 10 seconds and again after 130 seconds. The counter<br />

values are used to calculate the average interrupt rate of the auxiliary clock. Three<br />

measurements are taken to cancel the fixed portion of measurement latency error. The<br />

computed clock rate error is reported with one percent resolution. If the measured clock<br />

rate is more than 10 percent off the value being tested, the test for that rate fails.<br />

If any of these tests fail, check that the timer chip is properly initialized and is<br />

programmed with an appropriate scaling factor, if necessary. Interrupts should be<br />

enabled in sysAuxClkEnable( ) before the timer is started. Check that the<br />

sysAuxClkRoutine( ) is getting connected by sysAuxClkConnect( ), and that the<br />

sysAuxClkRoutine( ) is being called on every auxiliary clock interrupt.<br />

The fifth test verifies the operation of sysAuxClkDisable( ). This is done by periodically<br />

checking the same counter incremented by the first four tests. After sysAuxClkDisable( )<br />

is called, this counter should not continue to increment. If this test fails, check that the<br />

sysAuxClkDisable( ) routine is disabling timer interrupts, turning off the timer, and<br />

setting the running flag to FALSE.<br />

The sixth test performs parameter checking of the sysAuxClkRateSet( ) routine. This test<br />

checks that the proper return value is given for erroneous input parameters. If this test<br />

fails, check that sysAuxClkRateSet( ) performs error checking based on the<br />

AUX_CLK_RATE_MIN and AUX_CLK_RATE_MAX macros.<br />

The seventh test checks the return values of the sysAuxClkRateSet( ) and<br />

sysAuxClkRateGet( ) routines when first passed valid rates followed by erroneous rates.<br />

If this test fails, check that sysAuxClkRateSet( ) is setting the global rate variable, and that<br />

sysAuxClkRateGet( ) is reading the same variable.<br />

Barring serious hardware or software limitations (such as an identifiable VxWorks<br />

problem), the target board must pass all tests for the <strong>BSP</strong> to be validated.<br />

J<br />

CONFIGURATION PARAMETERS<br />

T1_EXTRA_AUXCLK<br />

Another rate to test (optional).<br />

EXAMPLE<br />

Output consists of:<br />

<strong>BSP</strong> VALIDATION TEST<br />

-------------------<br />

Target server : t53-160<br />

<strong>BSP</strong><br />

: mv147<br />

Log file<br />

: /tmp/bspValidationLog.5219<br />

Auxiliary Clock Test :<br />

373

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