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BSP Developer's Guide

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VxWorks 5.5<br />

<strong>BSP</strong> Developer’s <strong>Guide</strong><br />

DEVICE_WRITES_ASYNCHRONOUSLY<br />

The hardware provides asynchronous write operations to shared memory.<br />

This attribute is TRUE if the device can perform write operations to shared<br />

memory asynchronously to driver activity.<br />

SHARED_CACHE_LINES<br />

The hardware allows both the driver and the device to write to a single cache<br />

line. If any single cache line can be written by both the driver and the device,<br />

this attribute is TRUE. An example of this is a shared data structure such as this<br />

one:<br />

struct<br />

{<br />

short command;<br />

short status<br />

};<br />

In this case, the driver is responsible for writing the command field and the<br />

device is responsible for writing the status field.<br />

SNOOPED<br />

The hardware provides bus snooping. This attribute is TRUE if the target<br />

hardware supports bus snooping. Bus snooping makes cache issues transparent<br />

to the driver. Only full bus snooping that maintains full coherency is<br />

supported. Some processors provide partial snooping that does not meet the<br />

requirements of full memory coherency. Without full snooping, this attribute<br />

must be FALSE.<br />

SHARED_POINTERS<br />

The device’s control model allows the driver and the device to exchange<br />

memory pointers. This attribute is TRUE if the driver and the device exchange<br />

memory pointers.<br />

5.8.3 Developing the cacheLib Strategy<br />

This section describes how to devise a cacheLib strategy based on your driver’s<br />

attributes.<br />

Before proceeding, establish the target range that the driver is to support—for<br />

example, a single target, multiple differing targets, or broad support. This decision<br />

affects your choice of cache strategy. For example, a driver intended for broad<br />

support can be restricted to certain cacheLib routines because target specifics are<br />

unknown. However, drivers intended to support only a single known target can<br />

be designed to use the cacheLib routines that make best use of the target hardware.<br />

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