BSP Developer's Guide

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VxWorks 5.5 BSP Developer’s Guide It is recommended that you use CACHE_PIPE_FLUSH between an I/O write operation and a following I/O read operation. Successive writes or reads should not require any special protection. It is only when switching from writing to reading that pipeline flushing becomes essential. Note that flushing of the write pipeline does not mean the cache is automatically flushed to memory as well. You must still handle cache issues within the driver. Conversely, flushing or disabling the cache does not automatically flush or disable the write pipeline. The write pipeline is first in the hierarchy. SNOOPED Attribute This attribute is transparent to all memory types. Portable drivers use the appropriate flush and invalidate macros. However, if SNOOPED is TRUE, the macros evaluate to null operations. Target-specific drivers do not need flush or invalidate macros. Some systems implement partial snooping. They can read snoop and only invalidate cache data on a write. This does not meet the requirements for fully coherent memory. In this case, the SNOOPED attribute is FALSE not TRUE. MMU_TAGGING Attribute This attribute is transparent to the memory type obtained using the cacheDmaMalloc( ) routine. Portable drivers use the CACHE_DMA_FLUSH and CACHE_DMA_INVALIDATE macros. However, if MMU_TAGGING is TRUE, the macros evaluate to null operations. Target-specific drivers do not need CACHE_DMA_FLUSH or CACHE_DMA_INVALIDATE macros. This attribute does not typically affect memory obtained using the malloc( ) routine, the data section, or the bss section. Therefore, appropriate use of the CACHE_USER_xxxx and CACHE_DRV_xxxx flush and invalidate macros is required, as described in Flush and Invalidate Macros, p.107. USER_DATA_UNKNOWN Attribute With this attribute, your driver must maintain cache coherency of any data that is passed directly between the device and the user. For outgoing data, first flush the user data from the cache with the CACHE_USER_FLUSH macro before commanding the device to access the data. For incoming data, first invalidate the 108
5 Driver Guidelines cache for the device data using the CACHE_USER_INVALIDATE macro before passing the data to the user. DEVICE_WRITES_ASYNCHRONOUSLY Attribute This attribute is only of concern when combined with the SHARED_CACHE_LINES attribute; see the next two sections. 5 SHARED_CACHE_LINES Attribute The driver can easily function with this attribute as long as the driver can synchronize all operations to the data fields that may share a cache line (if the driver cannot synchronize the operations, see the next section). If the device cannot write to the data fields until explicitly commanded by the driver, the driver can sequence the use of flush macros, invalidate macros, and device commands in a manner that ensures data integrity. DEVICE_WRITES_ASYNCHRONOUSLY and SHARED_CACHE_LINES Attributes The combination of DEVICE_WRITES_ASYNCHRONOUSLY and SHARED_CACHE_LINES attributes can cause problems. Because the driver cannot synchronize the write operations of the device, the potential exists for data corruption. This happens if the device performs a write operation, then the driver performs a flush operation. In this sequence, the data value written by the device is wiped out by the cache line flush operation. For this set of attributes, the driver cannot use the general CACHE_DRV_FLUSH and CACHE_DRV_INVALIDATE macros because the driver can no longer control the integrity of the shared memory. The shared memory must be obtained using the cacheDmaMalloc( ) routine. Furthermore, this routine must provide memory that is write-coherent because the driver cannot perform any flush operations. The driver can check the attributes of the memory provided by cacheDmaMalloc( ) by using the CACHE_DMA_IS_WRITE_COHERENT macro. If this macro evaluates to FALSE, the driver cannot function reliably and should abort. 109
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VxWorks® 5.5 BSP DEVELOPER’S GUI
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1 Overview ........................
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Contents 1 Overview ...............
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Contents 3.6.5 Cache, MMU, and DMA
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Contents Memory-Mapped Chips ......
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Contents 7.3.3 System Configuration
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Contents 9.5.4 Processing .........
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Contents F Generic Drivers ........
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Contents Stopping the Driver Withou
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1 Overview 1.1 Introduction One str
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1 Overview ■ New Drivers Many new
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1 Overview Included with Tornado (n
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1 Overview ■ ■ ■ ■ ■ ■
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1 Overview Table 1-1 Font Usage for
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2 BSP Organization 2.1 Introduction
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2 BSP Organization Files in the tar
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2 BSP Organization Files in the tar
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2 BSP Organization Version 1.0 BSPs
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2 BSP Organization SM_MEM_SIZE The
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2 BSP Organization For boards witho
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2 BSP Organization PCI_MSTR_IO_LOCA
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2 BSP Organization The entry point
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2 BSP Organization target.nr The fi
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2 BSP Organization bootrom This fil
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2 BSP Organization sysSerialHwInit(
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2 BSP Organization The Motorola M68
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2 BSP Organization Many VxWorks fac
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2 BSP Organization further board in
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2 BSP Organization can have very un
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3 Creating a New BSP 3.1 Introducti
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3 Creating a New BSP 3.2 Setting Up
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3 Creating a New BSP Makefile At a
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3 Creating a New BSP char * sysBspR
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3 Creating a New BSP ... #endif } T
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3 Creating a New BSP int dummy; ...
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3 Creating a New BSP To find the so
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3 Creating a New BSP might want to
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Page 157 and 158: 7 Validation Testing 7.1 Introducti
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8 Writing Portable C Code This chap
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8 Writing Portable C Code attribute
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8 Writing Portable C Code 8.1.3 Sta
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8 Writing Portable C Code 8.1.5 Oth
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8 Writing Portable C Code The last
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8 Writing Portable C Code Always sp
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8 Writing Portable C Code 8.2 Tool
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9 Documentation Guidelines 9.1 Intr
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9 Documentation Guidelines Spelling
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9 Documentation Guidelines Table 9-
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9 Documentation Guidelines Table 9-
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9 Documentation Guidelines ■ Avoi
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9 Documentation Guidelines ■ ■
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9 Documentation Guidelines INCLUDE
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9 Documentation Guidelines INTRODUC
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9 Documentation Guidelines 9.5 Gene
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9 Documentation Guidelines uppercas
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9 Documentation Guidelines The foll
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10 Product Packaging 10.1 SETUP Dev
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10 Product Packaging ... include $(
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10 Product Packaging Vendor-Supplie
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10 Product Packaging in the project
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A Upgrading a BSP for Tornado 2.0 T
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A Upgrading a BSP for Tornado 2.0 A
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A Upgrading a BSP for Tornado 2.0
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A Upgrading a BSP for Tornado 2.0 6
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B Upgrading a BSP for Tornado 2.2 T
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B Upgrading a BSP for Tornado 2.2 C
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B Upgrading a BSP for Tornado 2.2
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B Upgrading a BSP for Tornado 2.2 c
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B Upgrading a BSP for Tornado 2.2
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C Upgrading a BSP for the VxWorks N
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D VxWorks Boot Sequence Table D-1 d
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D VxWorks Boot Sequence Table D-1 V
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E Component Language E.1 Component
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E Component Language REQUIRES r1 r2
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E Component Language } // default i
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E Component Language FOLDER_WINDVIE
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E Component Language initialization
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E Component Language INCLUDE_MMU_BA
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E Component Language INCLUDE_NETWOR
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E Component Language INCLUDE_WDB_ME
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F Generic Drivers F.1 Introduction
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F Generic Drivers CONSOLE_TTY This
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F Generic Drivers Define SIO_CALLBA
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F Generic Drivers NV_RAM_SIZE Defin
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F Generic Drivers F.10 PCI Bus The
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G Upgrading 4.3 BSD Network Drivers
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H Implementing a MUX-Based Network
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I Writing a SCSI-2 Device Driver I.
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I Writing a SCSI-2 Device Driver SC
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I Writing a SCSI-2 Device Driver On
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I Writing a SCSI-2 Device Driver A
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I Writing a SCSI-2 Device Driver *
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I Writing a SCSI-2 Device Driver ;/
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I Writing a SCSI-2 Device Driver Th
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J BSP Validation Test Suite Referen
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K BSP Validation Checklists This ap
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K BSP Validation Checklists BSP Val
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K BSP Validation Checklists 7. Veri
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K BSP Validation Checklists 2. If t
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K BSP Validation Checklists Validat
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K BSP Validation Checklists Manufac
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K BSP Validation Checklists Manufac
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L Refgen NOTE: In Tornado 1.0.1 and
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L Refgen * SYNOPSIS * \cs * void xx
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L Refgen Yields output approximatel
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L Refgen EXAMPLE INCLUDES SEE ALSO
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M BSP Product Contents When you are
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M BSP Product Contents Do not inclu
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Index A abort button 82 addressing
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Index clocks see also individual cl
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Index naming conventions 95 perform
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Index INCLUDE_USR_APPL 38 INCLUDE_V
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Index network drivers 58 network in
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Index scsiCtrlLib 324 scsiDirectLib
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Index testing, validation 139-158 s
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