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Configuration and Remote System Upgrades in Cyclone IV ... - Altera

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8–26 Chapter 8: <strong>Configuration</strong> <strong>and</strong> <strong>Remote</strong> <strong>System</strong> <strong>Upgrades</strong> <strong>in</strong> <strong>Cyclone</strong> <strong>IV</strong> Devices<br />

<strong>Configuration</strong><br />

Byte-Wide Multi-Device AP <strong>Configuration</strong><br />

The simpler method for multi-device AP configuration is the byte-wide multi-device<br />

AP configuration. In the byte-wide multi-device AP configuration, the LSB of the<br />

DATA[7..0]p<strong>in</strong> from the flash <strong>and</strong> master device (set to the AP configuration scheme)<br />

is connected to the slave devices set to the FPP configuration scheme, as shown <strong>in</strong><br />

Figure 8–8.<br />

Figure 8–8. Byte-Wide Multi-Device AP <strong>Configuration</strong><br />

Notes to Figure 8–8:<br />

CLK<br />

RST#<br />

CE#<br />

OE#<br />

ADV#<br />

WE#<br />

WAIT<br />

DQ[15:0]<br />

A[24:1]<br />

Micron P30/P33 Flash<br />

GND<br />

V CCIO (1)<br />

10 kΩ<br />

nCONFIG<br />

nCE<br />

DCLK<br />

nRESET<br />

FLASH_nCE<br />

nOE<br />

nAVD<br />

nWE<br />

I/O (5)<br />

DATA[15..0]<br />

PADD[23..0]<br />

VCCIO (1)<br />

VCCIO (1)<br />

10 kΩ<br />

Buffers (6)<br />

nSTATUS<br />

10 kΩ<br />

(1) Connect the pull-up resistors to the VCCIO supply of the bank <strong>in</strong> which the p<strong>in</strong> resides.<br />

(2) Connect the pull-up resistor to the VCCIO supply voltage of the I/O bank <strong>in</strong> which the nCE p<strong>in</strong> resides.<br />

(3) The nCEO p<strong>in</strong> is left unconnected or used as a user I/O p<strong>in</strong> when it does not feed the nCE p<strong>in</strong> of another device.<br />

(4) The MSEL p<strong>in</strong> sett<strong>in</strong>gs vary for different configuration voltage st<strong>and</strong>ards <strong>and</strong> POR time. You must set the master device <strong>in</strong> AP mode <strong>and</strong> the slave<br />

devices <strong>in</strong> FPP mode. To connect MSEL[3..0] for the master device <strong>in</strong> AP mode <strong>and</strong> the slave devices <strong>in</strong> FPP mode, refer to Table 8–5 on<br />

page 8–9. Connect the MSEL p<strong>in</strong>s directly to VCCA or GND.<br />

(5) The AP configuration ignores the WAIT signal dur<strong>in</strong>g configuration mode. However, if you are access<strong>in</strong>g flash dur<strong>in</strong>g user mode with user logic,<br />

you can optionally use the normal I/O to monitor the WAIT signal from the Micron P30 or P33 flash.<br />

(6) Connect the repeater buffers between the <strong>Cyclone</strong> <strong>IV</strong> E master device <strong>and</strong> slave devices for DATA[15..0] <strong>and</strong> DCLK. All I/O <strong>in</strong>puts must ma<strong>in</strong>ta<strong>in</strong><br />

a maximum AC voltage of 4.1 V. The output resistance of the repeater buffers must fit the maximum overshoot equation outl<strong>in</strong>ed <strong>in</strong> “<strong>Configuration</strong><br />

<strong>and</strong> JTAG P<strong>in</strong> I/O Requirements” on page 8–5.<br />

Word-Wide Multi-Device AP <strong>Configuration</strong><br />

CONF_DONE<br />

nCEO nCE<br />

nCEO<br />

nCE<br />

nCEO N.C. (3)<br />

MSEL[3..0]<br />

<strong>Cyclone</strong> <strong>IV</strong> E<br />

Master Device<br />

V CCIO (2) V CCIO (2)<br />

10 kΩ 10 kΩ<br />

(4)<br />

MSEL[3..0] (4)<br />

DQ[7..0]<br />

DATA[7..0]<br />

DCLK<br />

DQ[7..0]<br />

The more efficient setup is one <strong>in</strong> which some of the slave devices are connected to the<br />

LSB of the DATA[7..0]<strong>and</strong> the rema<strong>in</strong><strong>in</strong>g slave devices are connected to the MSB of<br />

the DATA[15..8]. In the word-wide multi-device AP configuration, the nCEO p<strong>in</strong> of the<br />

master device enables two separate daisy cha<strong>in</strong>s of slave devices, allow<strong>in</strong>g both<br />

cha<strong>in</strong>s to be programmed concurrently, as shown <strong>in</strong> Figure 8–9.<br />

<strong>Cyclone</strong> <strong>IV</strong> Device H<strong>and</strong>book, February 2013 <strong>Altera</strong> Corporation<br />

Volume 1<br />

nCONFIG<br />

nSTATUS<br />

CONF_DONE<br />

<strong>Cyclone</strong> <strong>IV</strong> E Slave Device<br />

nCONFIG<br />

DATA[7..0]<br />

DCLK<br />

nSTATUS<br />

CONF_DONE<br />

MSEL[3..0]<br />

<strong>Cyclone</strong> <strong>IV</strong> E Slave Device<br />

(4)

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