Configuration and Remote System Upgrades in Cyclone IV ... - Altera

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8–44 Chapter 8: Configuration and Remote System Upgrades in Cyclone IV Devices Configuration FPP Configuration Timing Figure 8–22 shows the timing waveform for the FPP configuration when using an external host. Figure 8–22. FPP Configuration Timing Waveform (1) nCONFIG nSTATUS (2) CONF_DONE (3) DCLK DATA[7..0] User I/O INIT_DONE Notes to Figure 8–22: t CFG t CF2CD t CF2ST1 t CF2CK t CF2ST0 t ST2CK t STATUS t CLK t CH t CL Byte 0 tDH Byte 1 Byte 2 Byte 3 Byte n-1 Byte n t DSU Tri-stated with internal pull-up resistor (1) The beginning of this waveform shows the device in user mode. In user mode, nCONFIG, nSTATUS, and CONF_DONE are at logic-high levels. When nCONFIG is pulled low, a reconfiguration cycle begins. (2) After power up, the Cyclone IV device holds nSTATUS low during POR delay. (3) After power up, before and during configuration, CONF_DONE is low. (4) Do not leave DCLK floating after configuration. It must be driven high or low, whichever is more convenient. (5) DATA[7..0] is available as a user I/O pin after configuration; the state of the pin depends on the dual-purpose pin settings. Table 8–12 lists the FPP configuration timing parameters for Cyclone IV devices. Table 8–12. FPP Timing Parameters for Cyclone IV Devices (Part 1 of 2) Symbol Parameter t CF2CD t CF2ST0 t CFG t STATUS t CF2ST1 t CF2CK nCONFIG low to CONF_DONE low nCONFIG low to nSTATUS low nCONFIG low pulse width nSTATUS low pulse width nCONFIG high to nSTATUS high nCONFIG high to first rising edge on DCLK Cyclone IV Device Handbook, February 2013 Altera Corporation Volume 1 t CD2UM Minimum Maximum (5) (4) User Mode User Mode Cyclone IV (1) Cyclone IV E (2) Cyclone IV (1) Cyclone IV E (2) — 500 ns — 500 ns 500 — ns 45 230 (3) µs — 230 (4) µs Unit 230 (3) — µs
Chapter 8: Configuration and Remote System Upgrades in Cyclone IV Devices 8–45 Configuration Table 8–12. FPP Timing Parameters for Cyclone IV Devices (Part 2 of 2) t ST2CK t DH t CD2UM t CD2CU t CD2UMC t DSU Symbol Parameter nSTATUS high to first rising edge of DCLK Data hold time after rising edge on DCLK CONF_DONE high to user mode (5) CONF_DONE high to CLKUSR enabled CONF_DONE high to user mode with CLKUSR option on Data setup time before rising edge on DCLK JTAG Configuration 2 — µs 0 — ns 300 650 µs 4 × maximum DCLK period — — t CD2CU + (3,192 × CLKUSR period) — — 5 8 — — ns t CH DCLK high time 3.2 6.4 — — ns t CL DCLK low time 3.2 6.4 — — ns t CLK DCLK period 7.5 15 — — ns f MAX DCLK frequency (6) — — 133 66 MHz Notes to Table 8–12: Minimum Maximum Cyclone IV (1) Cyclone IV E (2) Cyclone IV (1) Cyclone IV E (2) (1) Applicable for Cyclone IV GX and Cyclone IV E with 1.2-V core voltage. (2) Applicable for Cyclone IV E with 1.0-V core voltage. (3) This value is applicable if you do not delay configuration by extending the nCONFIG or nSTATUS low pulse width. (4) This value is applicable if you do not delay configuration by externally holding the nSTATUS low. (5) The minimum and maximum numbers apply only if you choose the internal oscillator as the clock source for starting the device. (6) Cyclone IV E devices with 1.0-V core voltage have slower FMAX when compared with Cyclone IV GX devices with 1.2-V core voltage. JTAG has developed a specification for boundary-scan testing (BST). The BST architecture offers the capability to efficiently test components on PCBs with tight lead spacing. The BST architecture can test pin connections without using physical test probes and capture functional data while a device is normally operating. You can also use the JTAG circuitry to shift configuration data into the device. The Quartus II software automatically generates .sof for JTAG configuration with a download cable in the Quartus II software Programmer. f For more information about the JTAG boundary-scan testing, refer to the JTAG Boundary-Scan Testing for Cyclone IV Devices chapter. February 2013 Altera Corporation Cyclone IV Device Handbook, Volume 1 Unit
Page 1 and 2: February 2013 CYIV-51008-1.6 CYIV-5
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Configuration and Remote System Upgrades in Cyclone IV ... - Altera

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