Service Manual - AMS Neve

SynchroNet ES/2 Service Manual
CIRCUIT DESCRIPTION
The MAX791 continuously monitors its +5v supply for power supply failure. When the +5v supply
falls below 4.8V then the !NMI line is pulled low. The reset is active when the +5V supply is below
4.65V. During power up when the supply crosses the 4.65V threshold the !RES line stays active for
200ms.
The MAX791 also looks after the supply and chip select enable signal to the battery backed up
RAM. When the +5V supply is above 4.65V the RAM (BVCC line in the ES/2) is supplied from the
main +5V line. If the +5V supply falls below this threshold then the RAM is supplied from the battery
and the chip select line (!BBRAM) is disabled. On powering up the MAX791 will disable the second
chip select pulse if the battery voltage is below 2V. If this is the case then the microprocessor
recognises the missing access and displays the battery voltage low warning message.
Clock generator
System clocks.
S_CLK
2CLK
E2
KERNEL microprocessor clocks.
E
Q
!BVMA
BR_!W
!BW
!BR
COMMS microprocessor clocks.
!E
!Q
!EVMA
BR_!W
!EW
!ER
Figure 3 : ES/2 clock signals
All system clock signals are derived from the main 16MHz clock (S_CLK) which is generated by X1.
The KERNEL and COMMS microprocessors are running on alternate phases. Other than reducing
clock skew there is no technical reason for this, the processors operate completely
asynchronously. Figure 3 shows the relationship between clock signals and a description of the
purpose of each clock signal follows.
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