eset => reset,clkTX => clkTX,speed => txSpeed3,enable => enableTXclk);---- The MAC controllerctrlMAC:MAC_controller port map(clk => clk,reset => reset,-- Control signals from ARM (avalon)setDtR => setDtR,clearTX => clearTX,RxStb => RxStb,TxStb => TxStb,ctrl32 => ctrl32,txBusy => txBusy,selectTXheaderMAC => selectTXheaderMAC,selectRXheaderMAC => selectRXheaderMAC,rW_TXheaderMAC => rW_TXheaderMAC,selectInt => selectInt,selectEmer => selectEmer,txStart => txStart,-- Control signals RXrxBusy => rxBusy,rxDone => rxDone,txToDo => txToDo,rxAckPse => rxAckPse,rxForUs => rxForUs,broadcast => broadcast,rxOkerr => rxOkerr,rxEn => rxEn,type3 => type3,-- Control signals misc-- clearCRC => clearCRC,doPing => doPing,doEmer => doEmer,packetShaper => packetShaper,-- General chip controlsetline3wire_enLow => setline3wire_enLow,line3wire_en => line3wire_en,RXchip_en => RXchip_en,TXchip_en => TXchip_en,mode3 => mode3,-- LEDs, buttons, addressespingLEDon => pingLEDon,emerLEDon => emerLEDon,TXLED => TXLED,RXLED => RXLED);----- The CRC16 encoder/decodercodecCRC:CRCcodec port map(clk => clk,clkTX => clkTX,clkRXsync => clkRXsync,reset => reset,txEnc => txEnc,rxDec => rxDec,txCRC => txCRC,rxBusy => rxBusy,txBusy => txBusy,clearCRC => clearCRC,shiftTXcrc => shiftTXcrc,calcTXcrc => calcTXcrc,calcRXcrc => calcRXcrc,CRCeqZero => CRCeqZero);-- The receiver blockrxDecBlock:Rx_Decode port map(clk => clk,clkRXsync => clkRXsync,reset => reset,rxSigSync => rxSigSync,patternSync => patternSync,headerRX32 => headerRX32,RX32 => RX32,myAddr8 => myAddr8,rxDec => rxDec,calcRXcrc => calcRXcrc,CRCeqZero => CRCeqZero,rxEn => rxEn,selectRXheader => selectRXheader,overFlow => overFlow,readFIFOrxOK => readFIFOrxOK,setDataLost => setDataLost,promiscuous => promiscuous,clearCRCrx => clearCRCrx,broadcast => broadcast,rxBusy => rxBusy,rxDone => rxDone,loadRXfifo => loadRXfifo,loadRXfifoReset => loadRXfifoReset,rxOKerr => rxOKerr,rxForUs => rxForUs,rxAckPse => rxAckPse,type3 => type3);-- The r<strong>and</strong>om Number GeneratorrGen:RanGen port map (clk => clk,reset => reset,myAddr6 => myAddr8(5 downto 0),r<strong>and</strong>Numb => r<strong>and</strong>Numb);ctrlIO:IO_Ctrl port map (clk => clk,clkTX => clkTX,reset => reset,PingButton => PingButton,EmerButton => EmerButton,PingLED => PingLED,EmerLED => EmerLED,busyLED => busyLED,miscLED0 => miscLED0,miscLED1 => miscLED1,maskButtons2 => ctrl32(13 downto 12),txBusy => txBusy,rxBusy => rxBusy,busy => busy,doPingBut => doPingBut,
doEmerBut => doEmerBut,inhibitEmer => inhibitEmer,pingLEDon => pingLEDon,emerLEDon => emerLEDon);--##########################################################-- Combinatorial logic, mux, ...--##########################################################-- Enable or disable clockenableTXclk