Design and Realization of a Prototype Hardware Platform for ...

The MegaWatch Wireless PlatformMaster's Thesis - Emanuel Corthay6 The MegaWatch Hardware Platform DesignEach block is linked to the other via a bus. The two bus specifications are the result of team workamong students doing related projects at LAP. They are available on the MegaWatch website at[13] and [14].The Wireless LAN uses a standard Compact Flash (similar to PCMCIA) connector, and the RF isdirectly piggy-backed to the extension board.The processor unit used in this project is a revision of Cédric Gaudin’s original diploma work, theRokEPXA board. The RF and WiFi block are off-the-shelf commercial products that we interfacedthrough the extension board to the system. The MegaWatch board has been entirely designedand built during this project. The power supply board is also an original work, but conducted jointlywith Cédric Gaudin.6.3 Main Processor Board6.3.1 IntroductionThe main board contains the heart of the system. It’s where the various data coming from theperipherals are analyzed and used according to a piece of software that runs on a microprocessor.The software can be stand alone or integrated within an operating system (OS). In the first case, itis compiled for the given processor or microcontroller architecture into fundamental instructionsexecuted sequentially. The developer must take care of everything. Moreover, having twodifferent applications running concurrently is not an easy task.By contrast, it can also be integrated within an OS. For more complex, integrated applications, theOS version is preferred, because a lot of features are made available to the developer throughstandard, portable functions of the operating system.On embedded devices like the MegaWatch units, the available space, computational power andmemory is a scarce resource. Thus, the OS and processor must be carefully chosen toaccommodate these special needs and use the available hardware as efficiently as possible. Atthe same time, the development must be as easy as possible for the developer.Another important thing to consider is the interface, or how to connect a given device to theprocessor. For advanced and wide-spread peripherals like memory, standard system bus definingthe electrical way to connect such a device to a processor exists. Examples include SDRAM, PCI,PCMCIA and CompactFlash. Most commercial processors then implement the bus directly on theprocessor through a certain number of specialized connections (referred to as PINs later in thisdocument), and include the associated controller on the chip. For less demanding peripherals,standard serial controllers for RS-232, I 2 C or SPI buses are usually integrated on most embeddedprocessors. That’s because they are very common for small peripherals like sensors, ADC andmotors, or simply to communicate with a standard PC.This sounds like a very promising interface, but requires fairly complex peripherals with a controllerfor the given bus. At the same time, such a peripheral is usually composed of a monolithic, staticchip known as ASIC (Application-Specific Integrated Circuit). The advantage of these dedicatedchips is their low cost due to high volume manufacturing, and high speed, because the logic on thechip is dedicated to a certain task. On the other hand, if the features offered do not meet therequirements for a system, there is no way to change them. That’s where an intermediate,reprogrammable solution comes into the picture. One such solution is an FPGA, or FieldProgrammable Gate Array. It not only offers a flexible, custom interface solution, but can alsoimplement various programmable functions, as illustrated in figure 10.25 / 83