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The MegaWatch Wireless PlatformMaster's Thesis - Emanuel Corthay7 The ProtocolsDataSignalClockSignalTimeReceivedData StreamSamplingInstant1 1 0 1 0DetectedFrequency‘1’ Level‘0’ LevelDetectedFrequencyChip outputUnstableSignalStableSignalFigure 22 Binary Data & Recovered Clock SignalBetween two sampling times, the signal may change; going from one to zero, zero to one, orstaying unchanged indicating a repetition of the bit. The further away from the sampling instant weare, the more unstable the signal is.Unlike typical digital circuits, in which there is a data signal and a clock signal transmittedseparately, in this radio link the clock signal is not transmitted over-the-air. It must be reconstituted(i.e. recovered) by the receiver circuitry using the incoming analog signal as a base. This processis called clock recovery[] and is done in the Xemics radio circuit.In order for this synchronization process to work, the same transmission speed must be used bythe receiver and the transmitter, and must be programmed in the radio chip upon initialization.Also, in order to have a valid recovered clock at the receiver when the actual transmission bitsequence arrives, some initialization bit sequence is sent prior to the real data transmission. Thissequence is composed of 0 and 1 sent alternatively and is referred to as the preamble. It does notcontain any information, but is used merely to synchronize the receiver clock with its transmitter’sequivalent.The transmission structure is explained in details in section 7.1.2.Bit synchronizer:For each incoming bit, the chip makes the best possible decision on whether the incoming signalwas a 0 or a 1. It then outputs and maintains the corresponding voltage level to rest of the systemduring an entire clock cycle. This is to ensure that the signal is stable at the sampling time, even ifthe incoming signal varies in time.Pattern Recognition Function:When no signal is present at the receiver, the ambient noise still causes the receiver to outputones and zeros with a recovered clock, but this bit stream is totally random. In order to detect thebeginning of a transmission from the noise, the pattern recognition function is used.The RF circuit comes with a pattern recognition module. This is a very useful feature when two ormore RF circuits are trying to establish communication. When the pattern bit sequence that weprogrammed at initialization time is detected by one of the receiver RF circuits, it sends a signal tothe rest of the system indicating that the incoming bit stream is a transmission (rather than noise)from another node.This special pattern identifying the beginning of a data frame is referred to as the Starting FrameDelimiter or SFD and is the same for all of the units.Transmission speed:40 / 83
The MegaWatch Wireless PlatformMaster's Thesis - Emanuel Corthay7 The ProtocolsThe chip supports several transmission speeds among them, 4.8, 9.6, 19.2, 38.4, and 76.8 Kbps.The speed must be programmed into the radio chip upon initialization. A speed of 38.4 Kbps hasbeen chosen for all tests related to this report. This conservative decision was taken so as toreduce transmission errors. In future work, experiments with the maximum speed will of course beconducted.The bit synchronizer and pattern recognition are functions that are integrated in the RF chip inhardware (VLSI). The signal bit stream with the recovered clock and the pattern line is then sent tothe FPGA for further processing.One last very important point to emphasize is that we are operating on a single frequency. Thismeans that we cannot transmit and receive at the same time. This type of mode of operation isknown as simplex mode.7.1.2 Layer 2 – The Data Link LayerAt this layer of the protocol, the data format of a basic transmission unit is defined. Because thesame radio frequency is shared among all units, a multiple access technique is put in place toarbiter the access to this shared medium.Transmission frame structure:We refer to a complete, basic transmission unit that as a frame. A frame starts after the preambleand the Starting Frame Delimiter (SFD) has been sent. It is composed of a header that containsthe source and destination address as well as other information, and a payload. The end of thetransmission is made known to the receiver through the length field present in the header.The frame transmission format is depicted in the figure below:24 16 6 38 to (38 + 512) 16 bitsPreamble SFD Length MAC Payload CRCHeader 38 bits6 6 6 6 3 1 1 8 1 VariableTA RA SA DA Type Ack Res Seq# More Payload0 to 64 BytesVariable length PayloadFigure 23 Frame FormatPreamble: 24 alternating 0 and 1 bits to synchronize the clock of the receiving endSFD:Length:16 bits used as a Start Frame Delimiter. Used to discriminate between the random bitstream from the receiver when no valid signal is present from the beginning of a datapacket. When this sequence is received, the PFGA starts storing the data received tosee if it is a valid packet.Indicate the size of the payload in Bytes. Set to zero if the packet only has a header.41 / 83
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68591056.3577.2231927.11.03LSM-LAP
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EPFL ACORT Mon Dec 1 08:47:30 2003
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Component Report MEGAWATCHmegawatch
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Single Node Nets Report MEGAWATCHme
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EPFL ACORT Thu 22.01.2004 11:21 Dra
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EPFL ACORT Thu Jan 22 11:21:21 2004
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Component Report SABUSALIMsabusalim
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BOM Report SABUSALIMsabusalim_gloss
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Signal Page Ref ROKEPXA_Brokepxa Th
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Component Report ROKEPXA_Brokepexa_
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BOM Report ROKEPXA_Brokepexa_gloss
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Power Pins Report ROKEPXA_Brokepexa
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Extensions Milli-BUS RokEPXAA24 MB_
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Extensions Milli-BUS RokEPXAA24 SPI
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24 MHzrf_TRX_moduletxSpeed3 = ctrl3
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-- Modify here if you change the st
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doEmerBut => doEmerBut,inhibitEmer
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xFifoReadEn -- ctrlreg32if (writeE
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futurestate txBusyTmp
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egPayload
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edge)-- If we reached the end of th
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-- ################################
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RxStbis in std-by)TxStbis in std-by
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when idleRx =>rxEn
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uf:process (clk, reset)beginif rese
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ReadPointer
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end process;-- Bufferize the signal
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when emerPressed =>bufferedEmerButt
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process (clk, reset)beginif (reset=
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component sreg8port ( clk : in std_
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-- Signals to and from the TXchip_e
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component IO_Ctrlport ( clkclkTXres
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File: avalon_bus.vhd[…]-- Above:
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eginif reset = '1' thencurrentstate
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----------------------------------s
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The MegaWatch Wireless PlatformMast
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