12.07.2015 Views

Wireless Ad Hoc and Sensor Networks

Wireless Ad Hoc and Sensor Networks

Wireless Ad Hoc and Sensor Networks

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<strong>Ad</strong>mission Controller Design for High-Speed <strong>Networks</strong> 157In the next section, the estimated traffic accumulation is used to obtainthe current b<strong>and</strong>width usage <strong>and</strong> the future b<strong>and</strong>width requirement forall classes of traffic. Finally, the aggregate b<strong>and</strong>width required to meet theestimated traffic <strong>and</strong> target QoS will be derived for all classes of trafficfor the next measurement interval. In the next section, using the aggregateb<strong>and</strong>width along with the physically available one, the available b<strong>and</strong>widthis obtained <strong>and</strong> allocated fairly among sources.4.4 B<strong>and</strong>width Estimation, Allocation, <strong>and</strong> AvailableCapacity DeterminationAssume that all the packets are transmitted at regularly spaced intervalsto the buffer <strong>and</strong> consider that at the moment the new measurementinterval starts, a new aggregate b<strong>and</strong>width value is being assigned. If thetraffic that is being accumulated at the next measurement interval isknown, then the additional b<strong>and</strong>width required to meet the packet/cellloss requirement can be determined as:( f ˆ( x( k)) − fˆ( x ( k−1)))∆Bw( k)=T(4.18)where ∆Bw( k)is the additional b<strong>and</strong>width required to process the newdata, f ˆ( x( k))<strong>and</strong> ˆ( ( )) are the traffic estimates at the instants k <strong>and</strong>k−1, respectively. Further, the following equation relates the additionalb<strong>and</strong>width required to satisfy the target CLR as:f x k− 1∆Bw kActual cell losses( ) =TCLR * T(4.19)where TCLR represents the target or desired packet/cell loss ratio. Inorder to ensure that sufficient b<strong>and</strong>width is assigned to meet the delayrequirement in the next measurement interval, the b<strong>and</strong>width requiredto meet the delay is given byxk ( )∆Bw( k)= τ(4.20)where xk ( ) is the current buffer occupancy <strong>and</strong> τ the target call transferdelay.Equation 4.18 shows that additional b<strong>and</strong>width needs to be assigned totransmit the data queued in the ingress switch buffer to its destination.

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