Xcell Journal: The authoritative journal for programmable ... - Xilinx

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EMBEDDED SYSTEMS A Scalable Software-Defined Radio Development System Sundance enters the SDR fray with a Xilinx-based platform. by Flemming Christensen Managing Director Sundance Flemming.C@sundance.com There has been a strong push in the past few years to replace analog radio systems with digital radio systems. The Department of Defense Joint Tactical Radio System program shifted the emphasis on the development of software-defined radio (SDR) to the forefront of research and development efforts in the defense, civilian, and commercial fields. Although it has existed for many years, SDR technology continues to evolve through newly funded ventures. The “holy grail” of SDR is its promise to solve incompatible wireless network issues by implementing radio functionalities as software modules running on generic hardware platforms. Future SDR platforms will comprise hardware and software technologies that enable reconfigurable system architectures for wireless networks and user terminals. Although new SDR-based systems are purported to be highly reconfigurable and reprogrammable right now, the truth is that SDR hardware platforms are still in their early development stages. Many issues must still be resolved, including reconfigurable signal processing algorithms, hardware and software co-design methodologies, and dynamically reconfigurable hardware. Overall, the main key issues for SDR embedded system platforms are flexibility, expandability, scalability, reconfigurability, and reprogrammability. 26 Xcell Journal Winter 2004
Add-on Modules Add-on Modules Add-on Modules Add-on Modules USB RS485 RS232 USB IEEE1394 COMPORTS LVDS Figure 1 – The SMT148 Meeting the Challenge SDR is characterized by a decoupling between the heterogeneous execution platform, based on hardware functions together with DSP and MCU processors, and the applications through abstraction layers. One of the approaches for meeting the complexity demands of third-generation systems is to use multi-core systems where a DSP and a microcontroller work together with an FPGA-based hardware coprocessor. With its embedded IBM PowerPC, the Xilinx ® Virtex-II Pro FPGA is rapidly becoming a solution that embeds and tightly couples reconfigurable logic and a processor in the same device. Sundance, a developer of advanced system architectures for high-performance signal processing applications, has focused on designing FPGA-based development platforms that address an SDR OEM’s wish list. Our challenge was to design a system that would provide the scalability SDR systems require. The Embedded System Controller The SMT148 (Figure 1) is one of many development systems Sundance has launched recently. Aimed specifically at SDR, the SMT148 is a fully configurable and expandable waveform development environment that meets the many requirements of SDR developers. This entry-level, stand-alone system enables radio designers to investigate and experiment with the JTAG JTAG RS485 many configurations of multi-channel software programmable and hardware-configurable digital radio. The SMT148 has at its heart a powerful embedded system controller that leverages the Xilinx Virtex- II Pro FPGA with its embedded PowerPC 405 processor (Figure 2). As an embedded system controller, the role of the Virtex-II Pro device is to manage the reconfiguration of the add-on modules, especially when downloading. Reconfiguration means switching between modes or updating a hardware/software component. In the global functioning of the SMT148, you can download many kinds of software (high-level applications, protocol stacks, low-level signal processing algorithms) and employ several methods to Power In Power Out download software. The eight RocketIO transceivers on the Virtex-II Pro device enable high-speed data transfer to additional SMT148 or Virtex-II Pro add-on modules. Downloads can leverage a powerful I/O architecture that includes the popular FireWire, USB interfaces, LVDS interfaces, and JTAG for debugging and downloads. Data flows into the FPGA and is managed by a Sundance program written for the embedded PowerPC before processing. Figure 3 is the C code comprising the data flow and RocketIO PowerPC program. Scalable, Reconfigurable Embedded Processors Scalability is addressed through four addon module sites, and you can partly resolve the requirements of dynamic reconfiguration by adding additional Xilinx-based FPGA modules. All add-on modules communicate through the Virtex-II Pro device, which also manages two 32-bit microcontrollers that enable communications with most widely used standards. With the RocketIO transceivers connected to differential pair connectors, you can connect FPGA systems directly Winter 2004 Xcell Journal 27 JTAG TIM Site 1 TIM Site 2 TIM Site 3 TIM Site 4 UART USB FireWire Interface DAC Circuitry 8 channels 16-bit 200kSps Power Management ADC Circuitry 8 channels 14-bit 400kSps ch0 ch7 ch0 ch7 External ComPorts Global Buses FPGA Virtex-II Pro XC2VP7, 20, 30 FFB56 100 MHz Crystal LVDS RSL 20 Gbits fullduplex Figure 2 – SMT148 systems architecture EMBEDDED SYSTEMS RS485 CPLD JTAG Configuration Chain SHB 400 Mbytes Xilinx JTAG 32 LED “Display”
Page 1 and 2: ISSUE 51, WINTER 2004 XCELL JOURNAL
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PPC. This FIFO allows the relativel
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I would like to see Xilinx System G
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Early Access: The Designer’s Edge
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Agilent Signal 250 Khz - 3Ghz Agile
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We picked [9 Xilinx Virtex-II Pro d
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LIN Bus - A Cost-Effective Alternat
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Automotive Cost Speed Network Per N
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Education Services Trims Your Learn
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Board of Education The UNM FPGA pro
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FPGAs Ensure Flexible and Adaptable
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System Communications Developing ap
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Forthcoming developments in future
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Why Prototype? The complexity assoc
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Xilinx Virtex-4 FPGAs http://www.xi
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TI Power Solutions: Power Behind Yo
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