European Journal of Scientific Research - EuroJournals
European Journal of Scientific Research - EuroJournals
European Journal of Scientific Research - EuroJournals
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<strong>European</strong> <strong>Journal</strong> <strong>of</strong> <strong>Scientific</strong> <strong>Research</strong><br />
ISSN 1450-216X Vol.20 No.4 (2008), pp.759-771<br />
© Euro<strong>Journal</strong>s Publishing, Inc. 2008<br />
http://www.eurojournals.com/ejsr.htm<br />
Design Space Exploration <strong>of</strong> Regular NoC Architectures: A<br />
Multi-Objective Evolutionary Algorithm Approach<br />
Rabindra Ku. Jena<br />
Faculty <strong>of</strong> IT, Institute <strong>of</strong> Management Technology, Nagpur, India<br />
E-mail: rk_jena2@rediffmail.com<br />
Musbah M. Aqel<br />
Faculty <strong>of</strong> IT, Middle East University for Graduate Studies<br />
Ammam, Jordan<br />
E-mail: Aqelm06@yahoo.com<br />
Gopal K. Sharma<br />
Department <strong>of</strong> IT<br />
ABV-Indian Institute <strong>of</strong> Information Technology & Management, Gwalior, India<br />
E-mail: gksharma@yahoo.com<br />
Prabhat K. Mahanti<br />
Department <strong>of</strong> CSAS, University <strong>of</strong> New Brunswick, Saint John, Canada<br />
E-mail: pkmahanti@yahoo.co.in<br />
Abstract<br />
In this paper, we address the problem <strong>of</strong> topological mapping <strong>of</strong> intellectual<br />
properties (IPs) on the tile <strong>of</strong> a mesh-based NoC to minimize energy and maximum<br />
bandwidth requirement. As the stated problem is NP-hard in nature, we proposed a<br />
heuristic technique based on multi-objective genetic algorithm to obtain an optimal<br />
approximation <strong>of</strong> the pareto-optimal. We have considered “many-many” mapping between<br />
switch and cores (IPs) instead <strong>of</strong> “one-one” mapping. The evaluation performed on<br />
randomly generated benchmarks and a real application (a M-JPEG encoder), showed the<br />
efficiency, accuracy and scalability <strong>of</strong> our proposed approach.<br />
Keywords: NoC optimization, energy, performance, system level synthesis, Genetic<br />
algorithm.<br />
1. Introduction<br />
Network on Chip (NoC) has been proposed as a solution for the communication challenges like<br />
propagation delays, scalability, infeasibility <strong>of</strong> synchronous communication etc. in a nano scale regime<br />
(Zitzler and Thiele, 1999; Hu and Marculescu, 2003). To meet these challenges under the strong timeto-market<br />
pressure, it is essential to increase the reusability <strong>of</strong> components and system architectures in<br />
a plug and play fashion (Hu and Marculescu, 2003). Simultaneously, the volume <strong>of</strong> data and control<br />
traffic among the cores grows. So, it is essential to address the communication-architecture synthesis
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