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Numonyx <strong>Wireless</strong> <strong>Flash</strong> <strong>Memory</strong> (<strong>W30</strong>)<br />
8.4.1 System Reset and RST#<br />
The use of RST# during system reset is important with automated program/erase flash<br />
devices, because the system expects to read from the flash memory when it comes out<br />
of reset. If a CPU reset occurs without a flash memory reset, the CPU is not properly<br />
initialized, because the flash memory might be providing status information instead of<br />
array data.<br />
Note: To allow proper CPU/flash device initialization at system reset, connect RST# to the<br />
system CPU RESET# signal.<br />
System designers must guard against spurious writes when VCC voltages are above<br />
V LKO . Because both WE# and CE# must be low for a command write, driving either<br />
signal to V IH inhibits writes to the flash device. The CUI architecture provides additional<br />
protection, because memory contents can be altered only after successful completion<br />
of the two-step command sequences.<br />
The flash device is also disabled until RST# is brought to V IH , regardless of its control<br />
input states.<br />
By holding the flash device in reset (RST# connected to system PowerGood) during<br />
power-up/down, invalid bus conditions during power-up can be masked, providing yet<br />
another level of memory protection.<br />
8.4.2 VCC, VPP, and RST# Transitions<br />
The CUI latches commands issued by system software, and is not altered by VPP or<br />
CE# transitions or WSM actions. Read-array mode is the power-up default state after<br />
the flash device exits from reset mode or after VCC transitions above V LKO (Lockout<br />
voltage).<br />
After completing program or block erase operations (even after VPP transitions below<br />
V PPLK ), the Read Array command must reset the CUI to read-array mode if flash<br />
memory array access is desired.<br />
8.5 Power Supply Decoupling<br />
When the flash device is accessed, many internal conditions change. Circuits are<br />
enabled to charge pumps and switch voltages. This internal activity produces transient<br />
noise.<br />
To minimize the effect of this transient noise, device decoupling capacitors are<br />
required. Transient current magnitudes depend on the flash device output capacitive<br />
and inductive loading. Two-line control and proper decoupling capacitor selection<br />
suppresses these transient voltage peaks.<br />
Note: Each flash device must have a 0.1 µF ceramic capacitor connected between each power<br />
(VCC, VCCQ, VPP) , and ground (VSS, VSSQ) signal. High-frequency, inherently lowinductance<br />
capacitors must be as close as possible to the package signals.<br />
November 2007 Datasheet<br />
Order Number: 290702-13 45