Numonyxâ„¢ Wireless Flash Memory (W30)

Table 20: Flash Device Identification Codes (Sheet 2 of 2)
Item
10.3 Read Query (CFI)
Address1
Base Offset
Numonyx Wireless Flash Memory (W30) (W30)
Block Lock-Down Status ( 2 )
Block 02h
D1 = 0 Block is not locked-down
D1 = 1 Block is locked down
Configuration Register Partition 05h Register Data
Protection Register Lock Status Partition 80h Lock Data
Protection Register
Notes:
Partition 81h - 88h Register Data
Multiple reads required to read the
entire 128-bit Protection Register.
1. The address is constructed from a base address plus an offset. For example, to read the Block Lock Status for block
number 38 in a BPD, set the address to the BBA (0F8000h) plus the offset (02h), which in this example is 0F8002h.
Then examine bit 0 of the data to determine whether the block is locked.
2. See Section 13.1.4, “Block Lock Status” on page 73 for valid lock status.
The W30 flash memory device contains a separate CFI query database that acts as an
on-chip datasheet. To access the CFI information within the W30 flash memory device,
issue the Read Query command and supply a specific address.
The address is constructed from the base address of a partition plus a particular offset
corresponding to the desired CFI field.
Appendix B, “Common Flash Interface” on page 89 shows accessible CFI fields and
their address offsets. Issuing the Read Query command to a partition that is
programming or erasing puts that partition in read query mode while the partition
continues to program or erase in the background.
10.4 Read Status Register
Data Description
The flash device status register displays program and erase operation status. The
status of a partition can be read after writing the Read Status Register command to any
location within the address range of that partition. Read-status mode is the default
read mode following a Program, Erase, or Lock Block command sequence. Subsequent
single reads from that partition return the partition status until another valid command
is written.
The read-status mode supports single synchronous and single asynchronous reads
only; it does not support burst reads.
The first falling edge of OE# or CE# latches and updates Status Register data. The
operation does not affect the modes of other partitions. Because the Status Register is
8 bits wide, only DQ [7:0] contain valid status register data; DQ [15:8] contain zeros.
See Table 21, “Status Register Definitions” on page 57 and Table 22, “Status Register
Descriptions” on page 57.
Each 4-Mbit partition contains its own status register. Bits SR[6:0] are unique to each
partition, but SR[7], the Device WSM Status (DWS) bit, pertains to the entire flash
memory device. SR[7] provides the program and erase status of the entire flash
device. By contrast, the Partition WSM Status (PWS) bit, SR[0], provides program and
erase status of the addressed partition only. Status register bits SR[6:1] present
information about partition-specific program, erase, suspend, V PP , and block-lock
states. Table 23, “Status Register Device WSM and Partition Write Status Description”
on page 57 describes the DWS (SR[7]) and PWS (SR[0]) combinations.
Datasheet November 2007
56 Order Number: 290702-13