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Numonyx <strong>Wireless</strong> <strong>Flash</strong> <strong>Memory</strong> (<strong>W30</strong>)<br />
Revision History<br />
Date of<br />
Revision<br />
Version Description<br />
09/19/00 -001 Initial release<br />
03/14/01 -002<br />
04/05/02 -003<br />
04/24/02 -004<br />
10/20/02 -005<br />
01/14/03 -006<br />
03/22/03 -007<br />
28F3208<strong>W30</strong> product references removed (product was discontinued)<br />
28F640<strong>W30</strong> product added<br />
Revised Table 2, Signal Descriptions (DQ 15–0 , ADV#, WAIT, S-UB#, S-LB#, V CCQ )<br />
Revised Section 3.1, Bus Operations<br />
Revised Table 5, Command Bus Definitions, Notes 1 and 2<br />
Revised Section 4.2.2, First Latency Count (LC 2–0 ); revised Figure 6, Data Output with LC<br />
Setting at Code 3; added Figure 7, First Access Latency Configuration<br />
Revised Section 4.2.3, WAIT Signal Polarity (WT)<br />
Added Section 4.2.4, WAIT Signal Function<br />
Revised Section 4.2.5, Data Output Configuration (DOC)<br />
Added Figure 8, Data Output Configuration with WAIT Signal Delay<br />
Revised Table 13, Status Register DWS and PWS Description<br />
Revised entire Section 5.0, Program and Erase Voltages<br />
Revised entire Section 5.3, Enhanced Factory Programming (EFP)<br />
Revised entire Section 8.0, <strong>Flash</strong> Security Modes<br />
Revised entire Section 9.0, <strong>Flash</strong> Protection Register; added Table 15, Simultaneous<br />
Operations Allowed with the Protection Register<br />
Revised Section 10.1, Power-Up/Down Characteristics<br />
Revised Section 11.3, DC Characteristics. Changed I CCS,I CCWS, I CCES Specs from 18 µA to<br />
21µA; changed I CCR Spec from 12 mA to 15 mA (burst length = 4)<br />
Added Figure 20, WAIT Signal in Synchronous Non-Read Array Operation Waveform<br />
Added Figure 21, WAIT Signal in Asynchronous Page-Mode Read Operation Waveform<br />
Added Figure 22, WAIT Signal in Asynchronous Single-Word Read Operation Waveform<br />
Revised Figure 23, Write Waveform<br />
Revised Section 12.4, Reset Operations<br />
Clarified Section 13.2, SRAM Write Operation, Note 2<br />
Revised Section 14.0, Ordering Information<br />
Minor text edits<br />
Deleted SRAM Section<br />
Added 128M DC and AC Specifications<br />
Added Burst Suspend<br />
Added Read While Write Transition Waveforms<br />
Various text edits<br />
Revised Device ID<br />
Revised Write Speed Bin<br />
Various text edits<br />
Added Latency Count Tables<br />
Updated Packing Ball-Out and Dimension<br />
Various text edits<br />
Minor text clarifications<br />
Revised Table 20, DC Current Characteristics, ICCS Revised Table 20, DC Current Characteristics, ICCAPS Removed Numonyx Burst order<br />
Minor text edits<br />
Updated Package Drawing and Dimensions<br />
Revised Table 22, Read Operations, tAPA Added note to table 15, Configuration Register Descriptions<br />
Added note to section 3.1.1, Read<br />
November 2007 Datasheet<br />
Order Number: 290702-13 5