Numonyxâ„¢ Wireless Flash Memory (W30)

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Numonyx Wireless Flash Memory (W30) (W30) Locking operations cannot occur during program suspend. Appendix A, “Write State Machine” on page 86 shows valid commands during erase suspend. 13.1.6 Status Register Error Checking Using nested locking or program command sequences during erase suspend can introduce ambiguity into status register results. Because locking changes require 2-cycle command sequences—for example, 60h followed by 01h to lock a block—following the Configuration Setup command (60h) with an invalid command produces a command sequence error (SR[5:4]=11b). If a Lock Block command error occurs during erase suspend, the flash device sets SR[4] and SR[5] to 1 even after the erase resumes. When erase is complete, possible errors during the erase cannot be detected from the status register, because of the previous locking command error. A similar situation occurs if a program operation error is nested within an erase suspend. 13.1.7 WP# Lock-Down Control The Write Protect signal, WP#, adds an additional layer of block security. WP# affects only blocks that previously had the Lock-Down command written to them. • After the lock-down status bit is set for a block, asserting WP# forces that block into the lock-down state [011] and prevents it from being unlocked. • After WP# is deasserted, the state of the block reverts to locked [111]. Software commands can then unlock the block (for erase or program operations) and subsequently re-lock it. Only flash device reset or power-down can clear the lock-down status bit and render WP# ineffective. Datasheet November 2007 74 Order Number: 290702-13
Numonyx Wireless Flash Memory (W30) Figure 34: Locking Operations Flowchart Optional Start Write 60h Block Address Write 01,D0,2Fh Block Address Write 90h BBA + 02h Read Block Lock Status Locking Change? Yes Write FFh Partition Address Lock Change Complete 13.2 Protection Register No LOCKING OPERATIONS PROCEDURE Bus Command Comments Operation Write Write Write (Optional) Read (Optional) Standby (Optional) Write The W30 flash memory device includes a 128-bit Protection Register. This protection register is used to increase system security and for identification purposes. The protection register value can match the flash device to the system CPU or ASIC to prevent flash device substitution. • The lower 64 bits within the protection register are programmed by Numonyx with a unique number in each flash device. • The upper 64 OTP bits within the protection register are left for the customer to program. Once programmed, the customer segment can be locked to prevent further programming. Note: The individual bits of the user segment of the protection register are OTP, not the register in total. The user can program each OTP bit individually, one at a time, if desired. However, after the protection register is locked, the entire user segment is locked and no more user bits can be programmed. The protection register shares some of the same internal flash device resources as the parameter partition. Therefore, RWW is allowed only between the protection register and the main partitions. Table 26 describes the operations allowed in the protection register, parameter partition, and main partition during RWW and RWE. November 2007 Datasheet Order Number: 290702-13 75 Lock Setup Lock, Unlock, or Lockdown Confirm Read ID Plane Block Lock Status Read Array Data = 60h Addr = Block to lock/unlock/lock-down (BA) Data = 01h (Lock block) D0h (Unlock block) 2Fh (Lockdown block) Addr = Block to lock/unlock/lock-down (BA) Data = 90h Addr = BBA + 02h Block Lock status data Addr = BBA + 02h Confirm locking change on DQ[1:0]. (See Block Locking State Transitions Table for valid combinations.) Data = FFh Addr = Any address in same partition
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Legal Lines and Disclaimers INFORMA
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Numonyx Wireless Flash Memory (W30)
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Date of Revision 11/17/03 -008 Vers
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• RWE - Read-While-Erase • RWW
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Numonyx Wireless Flash Memory (W30)
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Table 2: Top Parameter Memory Map M
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Figure 2: 32Mb, 64Mb and 128Mb QUAD
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Figure 4: 32Mb VF BGA Package Drawi
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4.0 Ballout and Signal Descriptions
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4.2 Signal Descriptions Numonyx Wir
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Table 6: Signal Descriptions - QUAD
Page 24 and 25: Numonyx Wireless Flash Memory (W30)
Page 26 and 27: 6.0 Electrical Specifications 6.1 D
Page 28 and 29: 7.0 AC Characteristics 7.1 Read Ope
Page 30 and 31: Table 12: Read Operations - 180 nm
Page 32 and 33: Figure 9: Latched Asynchronous Read
Page 34 and 35: Figure 11: Single Synchronous Read-
Page 38 and 39: Figure 15: Burst Suspend CLK Addres
Page 40 and 41: Figure 16: Write Operations Wavefor
Page 42 and 43: Figure 19: Synchronous Read to Writ
Page 44 and 45: 8.0 Power and Reset Specifications
Page 46 and 47: 8.6 Reset Specifications Table 15:
Page 48 and 49: 9.0 Flash Device Operations Numonyx
Page 50 and 51: 9.1.4 Reset 9.1.5 Write Numonyx Wir
Page 52 and 53: Table 18: Command Codes and Descrip
Page 54 and 55: Figure 26: Interleaving a 2-Cycle W
Page 56 and 57: Table 20: Flash Device Identificati
Page 58 and 59: 10.5 Clear Status Register Numonyx
Page 60 and 61: Figure 28: Word Program Flowchart S
Page 62 and 63: 11.3.2 Setup Numonyx Wireless Flash
Page 64 and 65: Figure 29: Enhanced Factory Program
Page 72 and 73: Figure 33: Block Locking State Diag
Page 76 and 77: Table 26: Simultaneous Operations A
Page 78 and 79: Figure 36: Protection Register Lock
Page 80 and 81: Table 28: Read Configuration Regist
Page 86 and 87: Appendix A Write State Machine Numo
Page 90 and 91: B.2 Query Structure Overview Numony
Page 92 and 93: Table 37: System Interface Informat
Page 94 and 95: B.6 Numonyx-Specific Extended Query
Page 96 and 97: Table 43: Partition Region 1 Inform
Page 98 and 99: Table 45: Partition and Erase-Block
Page 100 and 101: Table 47: 48F Type Stacked Componen
Page 102: Table 51: Parameter / Mux Configura
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Numonyxâ„¢ Wireless Flash Memory (W30)

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