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Accutorr Plus Service Manual - Mindray

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Detailed Description<br />

It would be helpful to have a schematic (0387-00-0716) while reading the following<br />

circuit descriptions.<br />

Power<br />

The power for the interface board is supplied by the system +5V. It is used for the<br />

pull-up resistors (R1, R2 and R6) on the serial and control lines as well as the LED drive<br />

resistors (R3 and R4) on optocoupler U1. It is also the input to isolation converters T1<br />

and T2. In addition, the system +5V is the supply voltage for optocoupler U2 and the<br />

logic gates in U3.<br />

T1 converts the unisolated system +5V into an isolated and regulated source, +5DIG, for<br />

many uses. The converter provides suitable isolation to the specified patient limit of<br />

1500VAC. The majority of the current from +5DIG is delivered to the MS-3 board. It<br />

also acts as the supply voltage for optocoupler U1 and the ESD protection array, U5. In<br />

addition, the digital voltage supplies the LED drive resistor (R5) on optocoupler U2.<br />

The second largest usage for the +5DIG is as an input for the LT1373. The LT1373 is a<br />

high frequency current mode switching regulator running at approximately 250kHz. In<br />

this design, it is configured as an extremely efficient dual flyback converter. It will<br />

convert a single input voltage ranging from 2.7 to 25 volts into a positive and negative<br />

output. This design utilizes the feedback to provide +/-15VAN to the MS-3 board. The<br />

power transistor “switch” integral to the LT1373 alternately charges and discharges the<br />

output capacitor C16. C12 and C13 provide the hold-up time for the output voltages.<br />

L2-C14 and L3-C15 are additional low pass filters for the analog voltages.<br />

Converter T2 generates an unregulated +/-9V (used for the front end). Schottky diodes<br />

CR1 and CR2 provide reverse polarity protection for T2. C10 and C11 filter the isolated<br />

+/-9V in order to reduce the ripple on each supply.<br />

Caps C17 and C19 on the input of the two DC/DC converters are necessary to reduce the<br />

ripple reflected back on to the system +5V. This noise is generated due to the transient<br />

nature of the MS-3 loading.<br />

Communication<br />

The interface signals to and from the MS-3 are isolated (2500VAC) by two optocouplers,<br />

U1 and U2. The optocouplers include integrated Schmitt triggers at the outputs. This<br />

provides logic compatible waveforms without the need for external pull-up resistors.<br />

NANDs are used in the transmission lines to provide the necessary inversions for proper<br />

signal polarity and to force the optocouplers normally off. The low duty cycle of the<br />

signals also holds the power requirements to reasonable levels.<br />

Communications with the SpO2 Module take place by a CMOS level asynchronous serial<br />

link from J1. The parameters are 8 data bits, no parity, one stop bit, with the data<br />

having “true” polarity. The baud rate is fixed at 9600 bps.<br />

Display Controller Connections<br />

A four pin right angled connector (J4) is available to interface with the future Display<br />

Controller board. The serial information received (TX and RX) will be used to generate<br />

a pleth waveform. The control signal (SpO2_COMM*) will be an active low signal used<br />

to enable a download to this future board.<br />

<strong>Accutorr</strong> <strong>Plus</strong> <strong>Service</strong> <strong>Manual</strong> Revised 12/20/00<br />

2-33<br />

Chapter 2 - Theory of Operation

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