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PIC16F84A 18-pin Enhanced Flash/EEPROM 8-Bit MCU Data Sheet

PIC16F84A 18-pin Enhanced Flash/EEPROM 8-Bit MCU Data Sheet

PIC16F84A 18-pin Enhanced Flash/EEPROM 8-Bit MCU Data Sheet

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<strong>PIC16F84A</strong>9.1 DC CHARACTERISTICS: <strong>PIC16F84A</strong>-04 (Commercial, Industrial)<strong>PIC16F84A</strong>-20 (Commercial, Industrial)DC CharacteristicsPower Supply PinsParameterNo.D001D001AStandard Operating Conditions (unless otherwise stated)Operating temperature 0°C ≤ TA ≤ +70°C (commercial)-40°C ≤ TA ≤ +85°C (industrial)Sym Characteristic Min Typ† Max Units ConditionsVDD Supply Voltage 4.04.5D002* VDR RAM <strong>Data</strong> RetentionVoltage (Note 1)D003 VPOR VDD Start Voltage toensure internalPower-on Reset signalD004*D004A*D010D010AD013D020D021D021ASVDDIDDIPDD022* ∆IWDTVDD Rise Rate toensure internalPower-on Reset signal——5.55.5VVXT, RC and LP osc configurationHS osc configuration1.5* — — V Device in SLEEP mode— VSS — V See section on Power-on Reset for details0.05*TBDSupply Current(Note 2) ——Power-down Current(Note 3)————Module DifferentialCurrent (Note 5)Watchdog Timer ————1.83107.01.01.06.0———4.5102028141620*25*V/msmAmAmAµAµAµAµAµAPWRT enabled (PWRTE bit clear)PWRT disabled (PWRTE bit set)See section on Power-on Reset for detailsRC and XT osc configuration (Note 4)FOSC = 4.0 MHz, VDD = 5.5VFOSC = 4.0 MHz, VDD = 5.5V(During <strong>Flash</strong> programming)HS osc configuration (<strong>PIC16F84A</strong>-20)FOSC = 20 MHz, VDD = 5.5VVDD = 4.0V, WDT enabled, industrialVDD = 4.0V, WDT disabled, commercialVDD = 4.0V, WDT disabled, industrialWDTE bit set, VDD = 4.0V, commercialWDTE bit set, VDD = 4.0V, extended* These parameters are characterized but not tested.† <strong>Data</strong> in "Typ" column is at 5.0V, 25˚C unless otherwise stated. These parameters are for design guidance onlyand are not tested.Note 1: This is the limit to which VDD can be lowered without losing RAM data.2: The supply current is mainly a function of the operating voltage and frequency. Other factors such as I/O <strong>pin</strong>loading and switching rate, oscillator type, internal code execution pattern, and temperature also have animpact on the current consumption.The test conditions for all IDD measurements in active operation mode are:OSC1=external square wave, from rail to rail; all I/O <strong>pin</strong>s tristated, pulled to VDD, T0CKI = VDD,MCLR = VDD; WDT enabled/disabled as specified.3: The power down current in SLEEP mode does not depend on the oscillator type. Power-down current ismeasured with the part in SLEEP mode, with all I/O <strong>pin</strong>s in hi-impedance state and tied to VDD and VSS.4: For RC osc configuration, current through Rext is not included. The current through the resistor can be estimatedby the formula IR = VDD/2Rext (mA) with Rext in kOhm.5: The ∆ current is the additional current consumed when this peripheral is enabled. This current should beadded to the base IDD measurement.© 1998 Microchip Technology Inc. Preliminary DS35007A-page 43

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