PIC16F84A 18-pin Enhanced Flash/EEPROM 8-Bit MCU Data Sheet

More documents

Recommendations

Info

PIC16F84A2.2.2.1 STATUS REGISTERThe STATUS register contains the arithmetic status ofthe ALU, the RESET status and the bank select bit fordata memory.As with any register, the STATUS register can be thedestination for any instruction. If the STATUS register isthe destination for an instruction that affects the Z, DCor C bits, then the write to these three bits is disabled.These bits are set or cleared according to device logic.Furthermore, the TO and PD bits are not writable.Therefore, the result of an instruction with the STATUSregister as destination may be different than intended.For example, CLRF STATUS will clear the upper-threebits and set the Z bit. This leaves the STATUS registeras 000u u1uu (where u = unchanged).Only the BCF, BSF, SWAPF and MOVWF instructionsshould be used to alter the STATUS register (Table 7-2)because these instructions do not affect any status bit.Note 1: The IRP and RP1 bits (STATUS) arenot used by the PIC16F84A and should beprogrammed as cleared. Use of these bitsas general purpose R/W bits is NOTrecommended, since this may affectupward compatibility with future products.Note 2: The C and DC bits operate as a borrowand digit borrow out bit, respectively, insubtraction. See the SUBLW and SUBWFinstructions for examples.Note 3: When the STATUS register is thedestination for an instruction that affectsthe Z, DC or C bits, then the write to thesethree bits is disabled. The specified bit(s)will be updated according to device logicFIGURE 2-1: STATUS REGISTER (ADDRESS 03h, 83h)R/W-0 R/W-0 R/W-0 R-1 R-1 R/W-x R/W-x R/W-xIRP RP1 RP0 TO PD Z DC C R = Readable bitbit7bit0 W = Writable bitU = Unimplemented bit,read as ‘0’- n = Value at POR resetbit 7: IRP: Register Bank Select bit (used for indirect addressing)The IRP bit is not used by the PIC16F84A. IRP should be maintained clear.bit 6-5: RP1:RP0: Register Bank Select bits (used for direct addressing)00 = Bank 0 (00h - 7Fh)01 = Bank 1 (80h - FFh)Each bank is 128 bytes. Only bit RP0 is used by the PIC16F84A. RP1 should be maintained clear.bit 4:bit 3:bit 2:bit 1:bit 0:TO: Time-out bit1 = After power-up, CLRWDT instruction, or SLEEP instruction0 = A WDT time-out occurredPD: Power-down bit1 = After power-up or by the CLRWDT instruction0 = By execution of the SLEEP instructionZ: Zero bit1 = The result of an arithmetic or logic operation is zero0 = The result of an arithmetic or logic operation is not zeroDC: Digit carry/borrow bit (for ADDWF and ADDLW instructions) (For borrow the polarity is reversed)1 = A carry-out from the 4th low order bit of the result occurred0 = No carry-out from the 4th low order bit of the resultC: Carry/borrow bit (for ADDWF and ADDLW instructions)1 = A carry-out from the most significant bit of the result occurred0 = No carry-out from the most significant bit of the result occurredNote:For borrow the polarity is reversed. A subtraction is executed by adding the two’s complement ofthe second operand. For rotate (RRF, RLF) instructions, this bit is loaded with either the high or loworder bit of the source register.DS35007A-page 8 Preliminary © 1998 Microchip Technology Inc.
PIC16F84A2.2.2.2 OPTION_REG REGISTERThe OPTION_REG register is a readable and writableregister which contains various control bits to configurethe TMR0/WDT prescaler, the external INT interrupt,TMR0, and the weak pull-ups on PORTB.Note:When the prescaler is assigned tothe WDT (PSA = '1'), TMR0 has a 1:1prescaler assignment.FIGURE 2-1: OPTION_REG REGISTER (ADDRESS 81h)R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1RBPU INTEDG T0CS T0SE PSA PS2 PS1 PS0 R = Readable bitbit7bit0 W = Writable bitU = Unimplemented bit,read as ‘0’- n = Value at POR resetbit 7: RBPU: PORTB Pull-up Enable bit1 = PORTB pull-ups are disabled0 = PORTB pull-ups are enabled (by individual port latch values)bit 6: INTEDG: Interrupt Edge Select bit1 = Interrupt on rising edge of RB0/INT pin0 = Interrupt on falling edge of RB0/INT pinbit 5: T0CS: TMR0 Clock Source Select bit1 = Transition on RA4/T0CKI pin0 = Internal instruction cycle clock (CLKOUT)bit 4: T0SE: TMR0 Source Edge Select bit1 = Increment on high-to-low transition on RA4/T0CKI pin0 = Increment on low-to-high transition on RA4/T0CKI pinbit 3: PSA: Prescaler Assignment bit1 = Prescaler assigned to the WDT0 = Prescaler assigned to TMR0bit 2-0: PS2:PS0: Prescaler Rate Select bitsBit Value TMR0 Rate WDT Rate0000010100111001011101111 : 21 : 41 : 81 : 161 : 321 : 641 : 1281 : 2561 : 11 : 21 : 41 : 81 : 161 : 321 : 641 : 128© 1998 Microchip Technology Inc. Preliminary DS35007A-page 9
Page 1 and 2: MPIC16F84A18-pin Enhanced Flash/EEP
Page 3 and 4: PIC16F84A1.0 DEVICE OVERVIEWThis do
Page 5 and 6: PIC16F84A2.0 MEMORY ORGANIZATIONThe
Page 7: PIC16F84A2.2.2 SPECIAL FUNCTION REG
Page 11 and 12: PIC16F84A2.3 PCL and PCLATHThe prog
Page 13 and 14: PIC16F84A3.0 I/O PORTSSome pins for
Page 15 and 16: PIC16F84A3.2 PORTB and TRISB Regist
Page 17 and 18: PIC16F84A4.0 TIMER0 MODULEThe Timer
Page 19 and 20: PIC16F84A5.0 DATA EEPROM MEMORYThe
Page 21 and 22: PIC16F84A6.0 SPECIAL FEATURES OF TH
Page 23 and 24: PIC16F84A6.2.3 RC OSCILLATORFor tim
Page 25 and 26: PIC16F84A6.4 Power-on Reset (POR)A
Page 27 and 28: PIC16F84AFIGURE 6-9:TIME-OUT SEQUEN
Page 29 and 30: PIC16F84A6.8.1 INT INTERRUPTExterna
Page 31 and 32: PIC16F84A6.11 Power-down Mode (SLEE
Page 33 and 34: PIC16F84A7.0 INSTRUCTION SET SUMMAR
Page 35 and 36: PIC16F84A8.0 DEVELOPMENT SUPPORT8.1
Page 37 and 38: PIC16F84A8.10 MPLAB Integrated Deve
Page 39 and 40: © 1998 Microchip Technology Inc. P
Page 41 and 42: PIC16F84A9.0 ELECTRICAL CHARACTERIS
Page 43 and 44: PIC16F84A9.1 DC CHARACTERISTICS: PI
Page 45 and 46: PIC16F84A9.3 DC CHARACTERISTICS: PI
Page 47 and 48: PIC16F84A9.5 AC (Timing) Characteri
Page 49 and 50: PIC16F84A9.5.3 TIMING DIAGRAMS AND
Page 51 and 52: PIC16F84AFIGURE 9-5:RESET, WATCHDOG
Page 53 and 54: PIC16F84A10.0 DC & AC CHARACTERISTI
Page 55 and 56: PIC16F84A11.0 PACKAGING INFORMATION
Page 57 and 58: PIC16F84A11.3 K04-051 18-Lead Plast
Page 59 and 60:
PIC16F84AAPPENDIX A: REVISION HISTO
Page 61 and 62:
PIC16F84ANOTES:© 1998 Microchip Te
Page 63 and 64:
PIC16F84AINDEXAAbsolute Maximum Rat
Page 65 and 66:
PIC16F84AON-LINE SUPPORTMicrochip p
Page 67 and 68:
PIC16F84APIC16F84A PRODUCT IDENTIFI
show all

PIC16F84A 18-pin Enhanced Flash/EEPROM 8-Bit MCU Data Sheet

You also want an ePaper? Increase the reach of your titles

Delete template?

Save as template?