PIC16F84A 18-pin Enhanced Flash/EEPROM 8-Bit MCU Data Sheet

PIC16F84AINDEXAAbsolute Maximum Ratings ............................................... 41AC (Timing) Characteristics ............................................... 47Architecture, Block Diagram ................................................ 3AssemblerMPASM Assembler .................................................... 37BBanking, Data Memory .................................................... 6, 8CCLKIN Pin ............................................................................ 4CLKOUT Pin ........................................................................ 4Code Protection ........................................................... 21, 32Configuration Bits ............................................................... 21Conversion Considerations ................................................ 59DData EEPROM Memory ..................................................... 19EEADR Register .................................................... 7, 24EECON1 Register ............................................ 7, 19, 24EECON2 Register ............................................ 7, 19, 24EEDATA Register .................................................. 7, 24Write Complete Enable (EEIE Bit) ....................... 10, 29Write Complete Flag (EEIF Bit) ............................ 19, 29Data EEPROM Write Complete ......................................... 29Data Memory ....................................................................... 6Bank Select (RP0 Bit) .............................................. 6, 8Banking ........................................................................ 6DC & AC Characteristics Graphs/Tables ........................... 53DC Characteristics ........................................... 43, 44, 45, 46Development Support ........................................................ 35Development Tools ............................................................ 35EEECON1 Register .............................................................. 19EEIF Bit ................................................................ 19, 29RD Bit ......................................................................... 19WR Bit ........................................................................ 19WREN Bit ................................................................... 19WRERR Bit ................................................................ 19Electrical Characteristics .................................................... 41Endurance ............................................................................ 1Errata ................................................................................... 2External Power-on Reset Circuit ........................................ 25FFirmware Instructions ......................................................... 33ftp site ................................................................................ 65Fuzzy Logic Dev. System (fuzzyTECH®-MP) ................... 37II/O Ports ............................................................................. 13ICEPIC Low-Cost PIC16CXXX In-Circuit Emulator ........... 35ID Locations ................................................................. 21, 32In-Circuit Serial Programming (ICSP) .......................... 21, 32Indirect Addressing ............................................................ 11FSR Register ............................................... 6, 7, 11, 24INDF Register ........................................................ 7, 24Instruction Format .............................................................. 33Instruction Set .................................................................... 33Summary Table .......................................................... 34INT Interrupt (RB0/INT) ...................................................... 29INTCON Register ........................................ 7, 10, 18, 24, 28EEIE Bit ............................................................... 10, 29GIE Bit ........................................................... 10, 28, 29INTE Bit ............................................................... 10, 29INTF Bit ............................................................... 10, 29RBIE Bit ............................................................... 10, 29RBIF Bit ......................................................... 10, 15, 29T0IE Bit ................................................................ 10, 29T0IF Bit .......................................................... 10, 18, 29Interrupt Sources ......................................................... 21, 28Block Diagram ........................................................... 28Data EEPROM Write Complete ........................... 28, 31Interrupt on Change (RB7:RB4) ................ 4, 15, 28, 31RB0/INT Pin, External ............................... 4, 16, 28, 31TMR0 Overflow .................................................... 18, 28Interrupts, Context Saving During ..................................... 29Interrupts, Enable BitsData EEPROM Write Complete Enable(EEIE Bit) ............................................................. 10, 29Global Interrupt Enable (GIE Bit) ............................... 10Interrupt on Change (RB7:RB4) Enable(RBIE Bit) ................................................................... 10RB0/INT Enable (INTE Bit) ........................................ 10TMR0 Overflow Enable (T0IE Bit) ............................. 10Interrupts, Flag Bits ........................................................... 28Data EEPROM Write Complete Flag(EEIF Bit) ............................................................. 19, 29Interrupt on Change (RB7:RB4) Flag (RBIF Bit) ....... 10RB0/INT Flag (INTF Bit) ............................................ 10TMR0 Overflow Flag (T0IF Bit) .................................. 10KKeeLoq® Evaluation and Programming Tools .................. 38MMaster Clear (MCLR)MCLR Pin .....................................................................4MCLR Reset, Normal Operation ................................ 23MCLR Reset, SLEEP .......................................... 23, 31Memory Organization ...........................................................5Data EEPROM Memory ............................................ 19Data Memory ................................................................6Program Memory ..........................................................5Migration from Baseline to Midrange Devices ................... 62MPLAB Integrated Development EnvironmentSoftware ............................................................................ 37OOn-Line Support ................................................................ 65OPCODE Field Descriptions ............................................. 33OPTION_REG Register ................................. 7, 9, 16, 18, 24INTEDG Bit ............................................................ 9, 29PS2:PS0 Bits ......................................................... 9, 17PSA Bit .................................................................. 9, 17RBPU Bit ......................................................................9T0CS Bit .......................................................................9T0SE Bit .......................................................................9OSC1 Pin ..............................................................................4OSC2 Pin ..............................................................................4Oscillator Configuration ............................................... 21, 22HS ........................................................................ 22, 28LP ........................................................................ 22, 28RC ................................................................. 22, 23, 28Selection (FOSC1:FOSC0 Bits) ................................ 21XT ........................................................................ 22, 28© 1998 Microchip Technology Inc. Preliminary DS35007A-page 63