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View File - University of Engineering and Technology, Taxila

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FIGURE 3.2BPSK space diagram.Instead <strong>of</strong> the baseb<strong>and</strong> signal vðtÞ assuming 0 to 1 amplitude values, itcould have never-return-to-zero (NRZ) format with 1 amplitude values, eachhaving period T s ; that is, T s ¼ T b from (3.2).3.2.2 Quadrature PSKWhen the index b ¼ 2; M ¼ 4, a 4-phase PSK is derived. It is also referred toas quadrature PSK, or simply QPSK, in which the phase <strong>of</strong> the carrier in (3.1)is nonzero <strong>and</strong> can take on one <strong>of</strong> four values: 45 , 135 , 225 , or 315 . Theangular separation between any two adjacent phasors <strong>of</strong> a QPSK is 90 (recall2p=M, where M in this case is 4). Figure 3.3 shows the block diagram <strong>of</strong> aquadrature modulator. Using Fig. 3.3, we can consider the functions required<strong>of</strong> QPSK modulation. The incoming serial bit stream enters the bit splitter(demultiplexer), where it is converted to a parallel, two-channel output: the I-(in-phase) channel <strong>and</strong> the Q-(in-quadrature) channel. Consequently, the data(bit) rate, r b , in each <strong>of</strong> the channels is r b =2, since b ¼ 2. The data rate is thesignalling speed in which information can be transferred in bits per second(bit=sec). The data in each channel are fed to the channel’s balanced modulatorwith input carrier’s relative phase <strong>of</strong> 0 <strong>and</strong> 90 , respectively. The outputs <strong>of</strong>the product modulators are fed to the bit-combining circuit (linear summer),where they are converted from the I- <strong>and</strong> Q-data channels to a single binaryoutput data stream. With b ¼ 2, we can code the input bits with correspondingtransmitted phase symbols as shown in Table 3.1, with each symbol having aduration <strong>of</strong> T s ¼ 2T b . Also, the QPSK constellation (space) diagram is shownin Fig. 3.4.Copyright © 2002 by Marcel Dekker, Inc. All Rights Reserved.

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