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View File - University of Engineering and Technology, Taxila

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Cyclic CodesCyclic codes are a subset <strong>of</strong> linear block codes. They are the most useful <strong>and</strong>popular because encoding <strong>and</strong> decoding can be implemented by using simpleshift registers: error detection <strong>and</strong> correction are achieved with shift registers<strong>and</strong> some additional logic gates. With a cyclic code, an end-around shift <strong>of</strong> acodeword yields another codeword. For example, ifðy 1 ; y 2 ; y 3 ; ; y n1 ; y n Þis a codeword, then, by definition, a cyclic code is also a codeword <strong>of</strong> the formðy n ; y 1 ; y 2 ; y 3 ; ; y n1 ÞIt follows from the above cyclic code description that only n 1 codewordscan be generated by cyclic shifts <strong>of</strong> a single codeword.Encoding is achieved by using either an ðn kÞ-stage shift register or ak-stage shift register. Syndrome calculation for decoding is achieved by anðn kÞ-stage shift register or a k-stage shift register. An example <strong>of</strong> encoding<strong>and</strong> decoding <strong>of</strong> a cyclic code is shown in Fig. 6.1.Fig. 6.1(a) is a (7, 4) encoder. It generates a 7-bit codeword using a 3-shift register ðr 0 ; r 1 ; r 2 Þ. The message bits form the first 4 bits <strong>of</strong> the 7-bitcodeword. When the gate is closed <strong>and</strong> the output switch is set to position 1,the most significant bits <strong>of</strong> the message bits are transmitted first. As the 4message bits are transmitted, the gate is opened, allowing the data bits to beshifted into the 3-shift register. After the 4 bits have been transmitted <strong>and</strong> fedinto the shift register, the output switch is set to position 2. The contents <strong>of</strong> theshift register are then transmitted, forming the 3 parity check bits.The output buffer from the encoder is the 7-bit-long codeword, which isfed into the syndrome forming part <strong>of</strong> the decoder in Fig. 6.1(b). Thesyndrome output is AND-gated, acting as the error detector. The AND gategives a binary ‘‘1’’ output only when the AND input equals 100. If the ANDoutput is ‘‘0,’’ the current bit in the received codeword is correct <strong>and</strong> thereceived sequence is then shifted out <strong>of</strong> the decoder.Cyclic codes have rich algebraic properties, which allow for efficientdecoding techniques. A number <strong>of</strong> books, including Peterson [11], Lin <strong>and</strong>Costello [9], <strong>and</strong> Shamnugam [10], have provided excellent mathematicaltreatment <strong>of</strong> cyclic codes that inquiring readers should consult.BCH CodesThe BCH (Bose–Chaudhuri–Hocquenghem) codes [12] are perhaps the mostpowerful <strong>and</strong> flexible group <strong>of</strong> cyclic error correction codes available. TheirCopyright © 2002 by Marcel Dekker, Inc. All Rights Reserved.

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