UltraScale Architecture Memory Resources
ug573-ultrascale-memory-resources
ug573-ultrascale-memory-resources
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Chapter 1<br />
Block RAM <strong>Resources</strong><br />
Introduction to <strong>UltraScale</strong> <strong>Architecture</strong><br />
The Xilinx® <strong>UltraScale</strong> architecture is a revolutionary approach to creating programmable<br />
devices capable of addressing the massive I/O and memory bandwidth requirements of next<br />
generation applications while efficiently routing and processing the data brought on chip.<br />
<strong>UltraScale</strong> architecture-based FPGAs address a vast spectrum of high-bandwidth,<br />
high-utilization system requirements through industry-leading technical innovations.<br />
<strong>UltraScale</strong> architecture-based devices share many building blocks to provide optimized<br />
scalability across the product range, as well as numerous new power reduction features for<br />
low total power consumption.<br />
Kintex® <strong>UltraScale</strong> FPGAs provide high performance with a focus on optimized<br />
performance per watt for applications including wireless, wired, and signal or image<br />
processing. High DSP and block RAM-to-logic ratios, and next generation transceivers are<br />
combined with low-cost packaging to enable an optimum blend of capability for these<br />
applications.<br />
Virtex® <strong>UltraScale</strong> FPGAs provide the highest system capacity, bandwidth, and<br />
performance. Delivering unprecedented logic capacity, serial I/O bandwidth, and on-chip<br />
memory, the Virtex <strong>UltraScale</strong> family pushes the performance envelope ever higher.<br />
This user guide describes the <strong>UltraScale</strong> architecture memory resources and is part of the<br />
<strong>UltraScale</strong> architecture documentation suite available at: www.xilinx.com/ultrascale.<br />
<strong>UltraScale</strong> <strong>Architecture</strong> <strong>Memory</strong> <strong>Resources</strong> www.xilinx.com<br />
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UG573 (v1.2) February 24, 2015