UltraScale Architecture Memory Resources
ug573-ultrascale-memory-resources
ug573-ultrascale-memory-resources
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Chapter 2: Built-in FIFO<br />
X-Ref Target - Figure 2-6<br />
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Figure 2-6:<br />
FWFT FIFO with Two Data Words in the FIFO<br />
Flags<br />
Empty Flag<br />
If EMPTY is asserted, no data is available to be read from the FIFO, and any additional read<br />
operations cause a read error (RDERR=1). The relationship of EMPTY to the output data on<br />
the DOUT output port depends on whether the FIFO is configured as a standard FIFO or<br />
FWFT FIFO.<br />
When writing to an empty FIFO, the number of clock cycles required for the EMPTY output<br />
to deassert depends on the FIFO configuration. For an independent-clocks FIFO, a write<br />
operation is synchronized internally to the RDCLK domain before it can influence the status<br />
of the Empty flag, resulting in a latency from the write operation to the deassertion of<br />
EMPTY that is a combination of a few write clocks followed by a few read clocks.<br />
The Empty flag is synchronous to the RDCLK domain and is intended as a handshaking<br />
signal for logic reading from the FIFO.<br />
PROGEMPTY Flag<br />
If PROGEMPTY is asserted, the number of words in the FIFO is less than or equal to<br />
PROG_EMPTY_THRESH.<br />
Because of the inherent latencies in the FIFO, especially for the independent-clocks FIFO,<br />
PROGEMPTY is always considered a pessimistic flag. This means that not all write<br />
operations might have synchronized to the RDCLK domain, and therefore the words in the<br />
<strong>UltraScale</strong> <strong>Architecture</strong> <strong>Memory</strong> <strong>Resources</strong> www.xilinx.com<br />
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UG573 (v1.2) February 24, 2015