UltraScale Architecture Memory Resources

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Chapter 2: Built-in FIFO Standard Mode In a standard FIFO, EMPTY is deasserted when one or more words are available to be read from the FIFO. By asserting RDEN, the next piece of data appears on the DOUT bus after the next rising edge of RDCLK. When the EMPTY flag is asserted, no more data is available to be read, and any additional reads cause RDERR to assert after the next RDCLK edge. See Figure 2-4. X-Ref Target - Figure 2-4 Figure 2-4: Standard FIFO Interface UltraScale Architecture Memory Resources www.xilinx.com Send Feedback 70 UG573 (v1.2) February 24, 2015
Chapter 2: Built-in FIFO FWFT Mode In a first-word fall-through (FWFT) FIFO, the data is placed on the DOUT bus before RDEN is asserted. When writing the first word to an EMPTY FIFO, the first word is directly transferred to the output, and appears on the DOUT bus at the same time EMPTY is deasserted. To prevent data loss in the system, this first output value does not disappear from the DOUT bus until RDEN is asserted. If no more data is available, EMPTY is asserted and the next word written to the FIFO again directly transfers to the output. Because the data appears on DOUT before the read operation, it can take one more last read operation for the FIFO to assert EMPTY (go empty). In either case, the same number of read operations as write operations are required to return the FIFO to an empty state. See Figure 2-5 and Figure 2-6. X-Ref Target - Figure 2-5 Figure 2-5: FWFT FIFO with One Data Word in the FIFO UltraScale Architecture Memory Resources www.xilinx.com Send Feedback 71 UG573 (v1.2) February 24, 2015
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UltraScale Architecture Memory Reso
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Table of Contents Revision History
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Chapter 1 Block RAM Resources Intro
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Chapter 1: Block RAM Resources •
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Chapter 1: Block RAM Resources •
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Chapter 1: Block RAM Resources Tabl
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Chapter 1: Block RAM Resources NO_C
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Chapter 1: Block RAM Resources Simp
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Chapter 1: Block RAM Resources capa
Page 19 and 20: Chapter 1: Block RAM Resources Stan
Page 21 and 22: Chapter 1: Block RAM Resources Data
Page 23 and 24: Chapter 1: Block RAM Resources Byte
Page 25 and 26: Chapter 1: Block RAM Resources Figu
Page 27 and 28: Chapter 1: Block RAM Resources Tabl
Page 29 and 30: Chapter 1: Block RAM Resources Regi
Page 33 and 34: Chapter 1: Block RAM Resources CASD
Page 39 and 40: Chapter 1: Block RAM Resources Cont
Page 41 and 42: Chapter 1: Block RAM Resources Read
Page 43 and 44: Chapter 1: Block RAM Resources Opti
Page 45 and 46: Chapter 1: Block RAM Resources Addi
Page 47 and 48: Chapter 1: Block RAM Resources Bloc
Page 49 and 50: Chapter 2 Built-in FIFO Overview Ma
Page 51 and 52: Chapter 2: Built-in FIFO Table 2-1:
Page 59 and 60: Chapter 2: Built-in FIFO Figure 2-3
Page 65 and 66: Chapter 2: Built-in FIFO FIFO18/36
Page 69: Chapter 2: Built-in FIFO • MIDDLE
Page 73 and 74: Chapter 2: Built-in FIFO FIFO might
Page 75 and 76: Chapter 2: Built-in FIFO the status
Page 77 and 78: Chapter 2: Built-in FIFO X-Ref Targ
Page 83 and 84: Chapter 3: Built-in Error Correctio
Page 89 and 90: Appendix A Additional Resources and
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UltraScale Architecture Memory Resources

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