Processor Local Bus Functional Model Toolkit User's Manual

PLB master mode 16
PLB master models
alu instructions 20
branch intructions 21
burst operations 19
command modes 18
conversion cycles with different PLB device
sizes 20
decode unit 17
general purpose register 20
internal master data memory 18
master model operation 17
PLB master mode 16
PLB model toolkit 1
bus functional compiler 12
bus functional language 29
bus models 14
compliance checks 69
features 2
timing 53
PLB model toolkit environment 5
PLB model toolkit testbench 9
PLB monitor 27
PLB slave commands 41
PLB slave designs under test 10
PLB slave models
burst modes 26
command modes 23
conversion cycles with different PLB device
sizes 26
internal slave data memory structure 24
internal slave memory checking 26
operations 23
ordered write cycles 25
pipeline modes 27
PLB slave 22
slave bus command modes 23
PLB toolkit environment
bus functional compiler files 5
example test case file 5
read me files 5
verilog files 6
vhdl files 6
PLB toolkit testbench
ieee packages 10
PLB master designs under test 10
PLB slave designs under test 10
programmable PLB data bus width and automatic
replication 9
vhdl signal types 10
processor local bus
signals 70
programmable PLB data bus width and automatic
replication 9
R
read me files 5
read transfers 53
running 4x bus models in 3x mode 15
S
signals
processor local bus 70
simulator configuration 12
slave bus command modes 23
slave interface checks 80
slave interface PLB core OR logic error 69
T
timeout handshake checks 91
transfer abort 56
V
verilog files 6
vhdl files 6
vhdl signal types 10
W
write transfers 55
94 Processor Local Bus Functional Model Toolkit Version 4.9.2