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Processor Local Bus Functional Model Toolkit User's Manual

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Chapter 3. PLB <strong>Toolkit</strong> Test Bench<br />

Figure 3 shows the default configuration of the PLB toolkit test bench environment. It contains<br />

instantiations of a PLB master model, PLB slave model, PLB core, and a PLB monitor model. It also<br />

contains the distributed multiplexers and logic to implement the PLB bus using AND/OR HDL<br />

statements.<br />

Note: Default configuration instantiates four masters and four slaves. The current PLB<br />

implementation supports up to eight masters.<br />

Designs under test may be instantiated in the toolkit test bench HDL which replace the default<br />

configuration. Also, the bus functional models may be instantiated in other test bench environments<br />

which include designs under test.<br />

PLB<br />

Monitor<br />

PLB<br />

Master 0<br />

<strong>Model</strong><br />

PLB<br />

Slave 0<br />

<strong>Model</strong><br />

PLB<br />

Master 1<br />

<strong>Model</strong><br />

<strong>Processor</strong> <strong>Local</strong> <strong>Bus</strong> Core<br />

PLB<br />

Slave 1<br />

<strong>Model</strong><br />

PLB<br />

Master 2<br />

<strong>Model</strong><br />

PLB<br />

Slave 2<br />

<strong>Model</strong><br />

PLB<br />

Master 3<br />

<strong>Model</strong><br />

PLB<br />

Slave 3<br />

<strong>Model</strong><br />

Figure 3. PLB <strong>Toolkit</strong> Testbench(plb_complex.vhd/.v)<br />

3.1 Programmable PLB Data <strong>Bus</strong> Width and Automatic Replication<br />

The PLB toolkit test bench uses a constant called PLB_DATA_BUS_WIDTH in declaring the actual<br />

PLB arbiter data bus signals. This constant defaults to 128 for the PLB 4.x toolkit, but may be<br />

changed to be 64 or 32 for other PLB arbiter implementations. The toolkit will automatically scale the<br />

model I/O’s and bus operations based on the PLB_DATA_BUS_WIDTH constant.<br />

In addition to programmable arbiter data bus widths, the PLB Test Bench contains logic to<br />

automatically perform the necessary Byte Enable(BE) and Data <strong>Bus</strong> replication as described by the<br />

PLB 4.x <strong>Bus</strong> Architecture specification. This replication is performed when necessary as smaller PLB<br />

masters and Slaves are connected to a wider data path PLB Arbiter. The master BE’s and write data<br />

bus(wrDbus) are replicated to the arbiter, and the slave read data bus(rdDbus) is also replicated to<br />

the arbiter when necessary. The test bench uses the msize/ssize signals from the masters and slave,<br />

together with other bus control signals to automatically generate a “mirror” signal.<br />

Version 4.9.2 PLB <strong>Toolkit</strong> Test Bench 9

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