Processor Local Bus Functional Model Toolkit User's Manual

5.2.1 Master Model Operation
The PLB master model operation section discusses the decode unit, internal master data memory,
command modes, burst modes, conversion cycles with different PLB device sizes, general purpose
registers and ALU instructions, and branch instructions. The operations of PLB master model are
shown in Figure 5.
Bus Functional
Language File
Bus Functional
Compiler
Command
File
5.2.2 Decode Unit
Decode Unit
Command
Memory
Decode
Logic
Sim Info
Cycle Info
Queue Info
Request
Complete
Response
Bus Unit
The PLB master model executes bus commands from internal command arrays which are loaded
from the command file. The command file is the file generated by the bus functional compiler.
When invoking the simulator, the command file should be included so that the command arrays are
initialized when the simulation model is loaded. This is accomplished by using an include file
parameter. The master commands are executed sequentially during simulation. The decode unit is
designed to decode and queue external bus requests every PLB clock until the bus unit cycle queue
is full.
Memory Address
Cycle
Queue
Bus
Interface
Logic
Memory
Logic
Version 4.9.2 PLB Bus Models 17
Memory Data
Figure 5. PLB Master Model
CLK, Reset
Timing Filter
Processor Local Bus