Processor Local Bus Functional Model Toolkit User's Manual

8.6.18 PLB_MnRdDAck
The following error messages are issued for this signal:
• Error 1.20.1
An error message is issued if PLB_MnRdDAck is asserted outside of the window defined from 2
clocks after the assertion of PLB_MnAddrAck to the clock after Sln_rdComp.
• Error 1.20.2
An error message is issued if PLB_MnRdDack is asserted during a DMA transfer which requires no
rdDAcks.
8.6.19 PLB_MnRdWdAddr(0:3)
The following error messages are issued for this signal:
• Error 1.21.1
An error message is issued when master does not own the read data bus and
PLB_MnRdWdAddr(0:3) contains non-zero data.
• Error 1.21.2
An error message is issued when PLB_MnRdWdAddr(0:3) does not match Sl_rdWdAddr(0:3).
• Error 1.21.3
An error message is issued when PLB_MnRdWdAddr(0:3) does not cover all the necessary read
word addresses in a line transfer.
8.6.20 PLB_MnBusy
The following error messages are issued for this signal:
• Error 1.22.1
An error message is issued when PLB_MnBusy is not active during a read transaction with slave.
• Error 1.22.2
An error message is issued when PLB_MnBusy is not active during a write transaction with slave.
• Warning 1.22.3
A warning message is issued when PLB_MnBusy is active for more than busy_cycle_max cycles.
8.6.21 PLB_MRdErr/PLB_MWrErr
• Error 1.23.1
An error message is issued when these signals are asserted without a PLB_Mrd/wrDack or without
a busy signal.
8.6.22 PLB_MSSize
• Error 1.24.1
Version 4.9.2 PLB Compliance Checks 79