Processor Local Bus Functional Model Toolkit User's Manual

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x Processor Local Bus Functional Model Toolkit Version 4.9.2
Tables Table 1. Summary of PLB Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Table 2. Mn_type Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 Table 3. Mn_size Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 Table 4. PLB_type Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 Version 4.9.2 Tables xi
Page 1 and 2: Processor Local Bus Functional Mode
Page 3: Patents and Trademarks IBM may have
Page 6 and 7: Command Modes . . . . . . . . . . .
Page 8 and 9: PLB_MnTimeout . . . . . . . . . . .
Page 12 and 13: xii Processor Local Bus Functional
Page 14 and 15: Device Control Register Bus Toolkit
Page 16 and 17: idges, a PLB to OPB bridge which is
Page 18 and 19: 1.3 PLB Implementation The PLB impl
Page 20 and 21: 2.3 VHDL/Verilog Files The followin
Page 22 and 23: This HDL file is a wrapper which in
Page 24 and 25: 3.2 Instantiating PLB Slave Designs
Page 26 and 27: Chapter 4. PLB Bus Functional Compi
Page 28 and 29: Chapter 5. PLB Bus Models The toolk
Page 30 and 31: 5.2 PLB Master Model The PLB master
Page 32 and 33: When the decode unit issues a bus r
Page 34 and 35: 5.2.6 Conversion Cycles with Differ
Page 36 and 37: 5.3 PLB Slave Model PLB slaves resp
Page 38 and 39: This response mode allows the user
Page 40 and 41: 5.3.6 Internal Slave Memory Checkin
Page 42 and 43: PLB Bus Mn_request Mn_priority(0:1)
Page 44 and 45: 6.2.1 Set_Alias () Command The set_
Page 46 and 47: • * size0_min/max = [integer] def
Page 48 and 49: These parameters specify the range
Page 50 and 51: This parameter specifies the mode i
Page 52 and 53: This parameter specifies the data w
Page 54 and 55: 6.3.11 Compare () Command The compa
Page 56 and 57: 6.4.1 Configure () Command The conf
Page 58 and 59: 6.4.1.2 Automatic Command Mode Conf
Page 60 and 61:
This parameter specifies the seed t
Page 62 and 63:
6.4.5 Mem_Check () Command The mem_
Page 64 and 65:
configure(SLAVE3_ADDR_HI_0=000FFFFF
Page 66 and 67:
• * level = [integer: range 0 to
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send(level=0) set_device (path=/plb
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7.3 Transfer Abort Figure 10 shows
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send(level=0) set_device (path=/plb
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write(addr=0000000c,size=0000,be=11
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write(addr=0000000c,size=0000,be=11
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mem_init(addr=00000000,data=0001020
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set_device (path=/plb_complex/plb_s
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mem_init(addr=0000001c,data=1c1d1e1
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8.5 Signal Summary Table Table 1 pr
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Synch_in Synch_out 8.6 Master Inter
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An error message is issued if the M
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An error message is issued when a m
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• Error 1.16.4 An error message i
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An error message is issued when PLB
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8.7.4 Sln_wait The following error
Page 98 and 99:
Page 100 and 101:
Page 102 and 103:
When PLB_PAValid or PLB_SAValid is
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8.8.9 PLB_rdBurst The following err
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8.9.2 PLB_MnRdBTerm The following e
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PLB master mode 16 PLB master model
Page 110:
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