Design Challenges: Avoiding the Pitfalls, winning the game - Xilinx

CONNECTIVITY
PCB
PCB
XCITE Technology
Reduces Cost with Simplified PCB Routing
IC1 IC2
Resistor
IC1 IC2
No Resistor
• Improved Signal Integrity through Easier Board Layout
– Reduces number of layers/vias that signal has to travel
– Puts termination right at the driver source
age compensation; puts the termination
inside the buffer circuitry where it
belongs; and saves board space and cost
by eliminating hundreds of discrete resistors.
Figure 3 shows the simplified board
layout and signal trace paths using both
conventional and Xilinx XCITE DCI termination
technology.
Power Plane Integrity
Power and ground planes are important to
maintaining signal integrity in FPGA
designs. To maintain the characteristic
impedance (Zo) across the frequency range
of interest, reference planes for single-ended
signals should be very low impedance.
Otherwise, the result is impedance discontinuities,
causing jitter due to reflections.
In addition, noisy power and ground planes
affect circuit performance on the die, causing
additional jitter. It is important to design
packages with continuous power and
ground planes to minimize impedance.
Conventional
XCITE Technology
Figure 3 – Xilinx XCITE technology reduces cost through simplified PCB routing.
Uncertainties
Phase Shift
Data Valid Window (