An Investigation into Transport Protocols and Data Transport ...

A.2. Network Interface Cards 278
A.2.2
Latency
In order to determine the limits of network interface card performance, the
implications of having data transferred through the PCI bus onto the NIC
should also be considered. The rate at which data can be transferred through
the PCI bus is determined by both the word size and the frequency of the
bus. Table A.8 shows the theoretical latencies expected from transferring
data through the PCI bus.
In order to determine the speed at which packets can be processed by
the PCI subsystem and the NIC, a single UDP packet (with relevant encapsulation)
were sent direct from userspace using the unix send() function
using various sized data packets. This ‘request’ packet solicits the generation
of a ‘response’ packet from the server application on the receiving machine,
which then sends a constant sized UDP packet back to the sender. The time
measured between the initial send and the receipt of the ‘response’ packet is
used to determine the Round-Trip Latency.
It is assumed that the processing of a UDP packet to be sent out requires
the copy of data into memory, and then the consequent transfer (after encapsulation
etc.) of the data through the PCI subsystem into the NIC hardware.
The rate at which data is to be transferred to the receiving system is then
limited to the rate at which the Layer 1 and Layer 2 hardware and data link
components operate. The receipt of the ‘response’ packet also requires the
traversal of the PCI subsystem followed copying of the data into memory
before being delivered to the application.
The theoretical inverse data rates of the PCI bus and NIC speeds are
given in Table A.8 and A.9 respectively. Table A.10 gives the memory data
rates for the PCs used in the tests. Therefore, define the minimal rate at