Integrator/CP User Guide - ARM Information Center

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System ArchitectureNoteTable B-1 on page B-3 provides a full listing of the external system bus signals. Moredetails on the AHB bus can be found on the ARM website at www.arm.com\arm\amba.3.2.2 Bus connectors HDRA and HDRBThe system bus is connected between the baseboard, core module card, and additionallogic modules using the HDRA and HDRB connectors.CautionThe Integrator/CP supports only one ARM Integrator core module.Custom core modules can be added, but they must operate in slave mode andcommunicate with an ARM core module using shared memory.Connector Pins FunctionThe signals carried by these connectors are described in Table 3-1 and the pinouts forthe base board and core module are shown in Appendix B Connector Pinouts.HDRA A[31:0] This is the AHB address bus.Table 3-1 System bus connector signal assignments for AHB-LiteB[31:0]C[31:0]D[31:0]These carry the display interface signals.These carry AHB bus control signals and various interface signals.This is the AHB data bus. This uses a bidirectional bus HDATA rather than theseparate unidirectional buses HWDATA and HRDATA described in the AMBAspecification.HDRB E[31:0] This bus carries the system bus control signals. These are mainly the signals associatedwith the Integrator system, such as interrupt requests and clocks.There are noarbitration signal connections on the baseboard.The clock signals, interrupt signals, module ID, and module presence signals arerouted so that they rotate up through the stack (see Module-assigned signals onpage 3-6).These pins correspond with the pins labeled H[31:0] on logic modules.F[31:0]G[16:0]This set of pins is used to implement a variety of interface connections.This set of pins is used to implement the Multi-ICE/JTAG signals and FPGAconfiguration control signals.These pins correspond with the J[16:0] pins on logic modules.3-4 Copyright © 2002 ARM Limited. All rights reserved. ARM DUI 0159B
System ArchitectureNoteThere are no free pins. Expansion must use the EXPIM connector on a logic module.ARM DUI 0159B Copyright © 2002 ARM Limited. All rights reserved. 3-5
Page 1 and 2: ®Integrator /CPCompact Platform Ba
Page 3 and 4: Conformance NoticesThis section con
Page 5 and 6: ContentsIntegrator/CP User GuidePre
Page 7 and 8: PrefaceThis preface introduces the
Page 9 and 10: PrefaceTypographical conventionsThe
Page 11 and 12: Preface• MultiMedia Card Product
Page 13 and 14: Chapter 1IntroductionThis chapter i
Page 15 and 16: IntroductionCore moduleBaseboardFig
Page 17 and 18: Introduction1.2.2 System connectors
Page 19 and 20: IntroductionCore module connectorsF
Page 21 and 22: IntroductionLED Color FunctionTable
Page 23 and 24: Introduction1.3.3 Care of connector
Page 25 and 26: Chapter 2Getting StartedThis sectio
Page 27 and 28: Getting Started2.1 Setting the DIP
Page 29 and 30: Getting StartedTable 2-2 shows the
Page 31 and 32: Getting Started2.4 System expansion
Page 34 and 35: Getting Started2.5.2 Possible effec
Page 36 and 37: Getting Started2.5.5 System informa
Page 38 and 39: System Architecture3.1 About the sy
Page 42 and 43: System Architecture3.3 Module-assig
Page 44 and 45: System ArchitectureCFGSEL0CFGSEL1HI
Page 46 and 47: System ArchitectureThe APB is an AM
Page 48 and 49: System ArchitectureNoteThe copies o
Page 50 and 51: System Architecture3.6 Interrupt co
Page 52 and 53: System ArchitectureAn example of th
Page 54 and 55: System ArchitectureThe secondary co
Page 56 and 57: System ArchitectureNoteThe constant
Page 58 and 59: System ArchitecturenFIQ3 nFIQ0 nFIQ
Page 60 and 61: System Architecture3.8 Configuring
Page 62 and 63: System ArchitecturePeripheral Addre
Page 64 and 65: System ArchitectureCP_FLASHPROGThe
Page 66 and 67: System ArchitectureCP_DECODEBits 7
Page 68 and 69: Peripherals and Interfaces4.1 GPIO
Page 70 and 71: Peripherals and Interfaces4.2 Ether
Page 72 and 73: Peripherals and Interfaces4.3 Displ
Page 74 and 75: Peripherals and InterfacesLCD1_BIAS
Page 76 and 77: Peripherals and InterfacesThe timin
Page 78 and 79: Peripherals and InterfacesFor VGA o
Page 80 and 81: Peripherals and Interfaces4.4 Touch
Page 82 and 83: Peripherals and InterfacesTouchscre
Page 84 and 85: Peripherals and InterfacesTable 4-9
Page 86 and 87: Peripherals and Interfaces4.5 Audio
Page 88 and 89: Peripherals and InterfacesPRESETnPW
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Peripherals and InterfacesWhen the
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Peripherals and InterfacesTable 4-1
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Peripherals and Interfaces4.6.2 Pri
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Peripherals and Interfaces4.7.2 KMI
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Peripherals and Interfaces4.8.2 UAR
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Peripherals and Interfaces4.8.5 Ove
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Peripherals and Interfaces4.9 Count
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Peripherals and Interfaces4.10 Debu
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Peripherals and Interfaces4-52 Copy
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System Expansion5.1 Expanding your
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System Expansion5-4 Copyright © 20
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Porting Integrator/AP and IM-PD1A.1
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Porting Integrator/AP and IM-PD1A.3
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Connector PinoutsB.1 Header connect
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Connector PinoutsB.1.2Baseboard con
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Connector PinoutsTable B-2 HDRB sig
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Connector Pinouts465321Figure B-4 K
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Connector PinoutsTable B-5 Generic
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Connector Pinouts1 2 3 4 56 7 8 9 1
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Connector PinoutsTable B-9 Touchscr
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Connector PinoutsB.2.6Ethernet debu
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Connector PinoutsLEDDATA_BUF12GNDnL
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Connector PinoutsMCI_112GNDMCI_2GND
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Connector PinoutsB-22 Copyright ©
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1 2 3 4OFFTest PointsC.1 Baseboard
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Test PointsC-4 Copyright © 2002 AR
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GlossaryDTEETMFIFOFPGAGPIOJTAGKMILC
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Indexregister bit assignments 3-16F
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IndexIndex-4 Copyright © 2002 ARM
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