Integrator/CP User Guide - ARM Information Center

System ArchitectureNoteThe constants in these C code stubs must contain bit patterns necessary to set only therequired interrupt mask bits. For example, PIC_UARTINT0 must contain 0x02 to set onlythe UART0 bit in the PIC_IRQ_ENCLR register.Determining and clearing IRQ interruptsTo determine an interrupt source, read the STATUS registers in the PIC and CIC todetermine the interrupt controller that generated the interrupt. The sequence todetermine and clear the interrupt is:1. Determine the interrupt source by reading CM_IRQ_STATUS and PIC_STATUS.The interrupt handler is directed by the status register information to the particularperipheral that generated the interrupt. In the case of SIC interrupts the interrupthandler must also read the SIC STATUS register to determine the interrupt source.2. Determine the peripheral interrupt source by reading the peripheral maskedinterrupt status register.3. Clear the peripheral interrupt by setting the appropriate bit in the peripheralinterrupt clear register.The following pseudo code example demonstrates how the UART0 CTS interrupt isdetected:If CM_IRQ_STATUS flags set,. . . CIC interrupt handlerIf PIC_STATUS flags set,. . . PIC interrupt handlerIf PIC_CPPLDINT set,. . . SIC interrupt handlerIf PIC_UARTINT0 set,. . . UART0 interrupt handlerIf UART0_UARTMIS, UART_CTSINTR flag set,. . . act on interrupt then clear flag with UARTICR. . . Test other PIC flags3.6.5 Interrupt routing between Integrator modulesFigure 3-8 on page 3-22 shows how the IRQ signals are routed from the logic modulesdown to the interrupt controllers. It highlights how the signals are routed so that, forexample, the interrupt request from logic module 2 connects to LM_INT2 (IRQ[2]) on3-20 Copyright © 2002 ARM Limited. All rights reserved. ARM DUI 0159B