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Integrator/CP User Guide - ARM Information Center

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Peripherals and InterfacesTable 4-11 PrimeCell AACI register summary (continued)Address Name Type Size Description0x1D0000B0–0x1D00017F - - - Reserved0x1D000180–0x1D00018C - - - Reserved for test purposes0x1D000190–0x1D000FDC - - - Reserved0x1D000FE0 AACI_PERIPHID0 Read 8 Identification register, bits [7:0]0x1D000FE4 AACI_PERIPHID1 Read 8 Identification register, bits [15:8]0x1D000FE8 AACI_PERIPHID2 Read 8 Identification register, bits [23:16]0x1D000FEC AACI_PERIPHID3 Read 8 Identification register bits, [31:24]0x1D000FF0 AACI_PCELLID0 Read 8 PrimeCell identification register, bits [7:0]0x1D000FF4 AACI_PCELLID1 Read 8 PrimeCell identification register, bits [15:8]0x1D000FF8 AACI_PCELLID2 Read 8 PrimeCell identification register, bits [23:16]0x1D000FFC AACI_PCELLID3 Read 8 PrimeCell identification register, bits [31:24]4-26 Copyright © 2002 <strong>ARM</strong> Limited. All rights reserved. <strong>ARM</strong> DUI 0159B

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