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M16C User Manual.pdf

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Clock-Synchronous Serial I/OMitsubishi microcomputers<strong>M16C</strong> / 62 GroupSINGLE-CHIP 16-BIT CMOS MICROCOMPUTERFollowing are some examples in which various functions (a) through (g) are selected:_______• Transmission Operation WITH: CTS function, transmission at falling edge of transfer clock, LSBFirst, interrupt at instant transmission buffer is emptied; WITHOUT transfer clock output to multiplepins function ............................................................................................................................ P334_______ _______• Transmission Operation WITH: CTS/RTS function disabled, transmission at falling edge of transferclock, LSB First, interrupt at instant transmission is completed; WITH transfer clock output to multiplepins function (UART0 selection available) ....................................................................... P338• Reception WITH: RTS function, reception at falling edge of transfer clock, LSB First, successivereception mode disabled; WITHOUT transfer clock output to multiple pins function .............. P342(6) Input to the serial I/O and the direction registerTo input an external signal to the serial I/O, set the direction register of the relevant port to input.(7) Pins related to the serial I/O_______ ________ _______________• CTS0, CTS1, CTS2 pins Input pins for the CTS function________ ________ _______________• RTS0, RTS1, RTS2 pins Output pins for the RTS function• CLK0, CLK1, CLK2 pins Input/output pins for the transfer clock• RxD0, RxD1, RxD2 pins Input pins for data• TxD0, TxD1, TxD2 pins Output pins for data (Since TxD2 pin is N-channel open drain, this pinneeds pull-up resistor.)• CLKS1 pinOutput pin for transfer clock. Can be used as transfer clock output pin inthe transfer clock output to multiple pins function.(8) Registers related to the serial I/OFigure 2.4.1 shows the memory map of serial I/O-related registers, and Figures 2.4.2 to 2.4.6 showserial I/O-related registers.004F16005016005116005216005316005416UART2 transmit interrupt control register (S2TIC)UART2 receive interrupt control register (S2RIC)UART0 transmit interrupt control register (S0TIC)UART0 receive interrupt control register (S0RIC)UART1 transmit interrupt control regster(S1TIC)UART1 receive interrupt control register(S1RIC)037816 UART2 transmit/receive mode register (U2MR)037916 UART2 bit rate generator (U2BRG)037A16UART2 transmit buffer register (U2TB)037B16037C16 UART2 transmit/receive control register 0 (U2C0)037D16 UART2 transmit/receive control register 1 (U2C1)037E16UART2 receive buffer register (U2RB)037F1603A01603A11603A21603A31603A41603A51603A61603A71603A81603A91603AA1603AB1603AC1603AD1603AE1603AF1603B01603B116UART0 transmit/receive mode register (U0MR)UART0 bit rate generator (U0BRG)UART0 transmit buffer register (U0TB)UART0 transmit/receive control register 0 (U0C0)UART0 transmit/receive control register 1 (U0C1)UART0 receive buffer register (U0RB)UART1 transmit/receive mode register (U1MR)UART1 bit rate generator (U1BRG)UART1 transmit buffer register (U1TB)UART1 transmit/receive control register 0 (U1C0)UART1 transmit/receive control register 1 (U1C1)UART1 receive buffer register (U1RB)UART transmit/receive control register 2 (UCON)Figure 2.4.1. Memory map of serial I/O-related registers328

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