M16C User Manual.pdf

External BusesMitsubishi microcomputersM16C / 62 GroupSINGLE-CHIP 16-BIT CMOS MICROCOMPUTER5.5.2 Connecting Low-Speed MemoryTo connect memory with long access time [ta(A)], either decrease the frequency of BCLK or set a soft-________ware wait. Using the RDY feature allows you to connect memory having the timing that precludes connectionthough you set software wait.(1) Using software waitSet software wait by using either of bit 7 (PM17) of processor mode register 1 or bits 4 through 7(CS0W through CS3W) of the chip select control register. With software wait set, if an address spaceis accessed in which a separate bus is selected, the bus cycle results in two cycles of BCLK; if anaddress space is accessed in which a multiplex bus is selected, the bus cycle results in three cycles ofBCLK.If bit 7 (PM17) of processor mode register 1 is set to “Wait selected”, the microcomputer accessesevery area with this option in effect. If bit 7 (PM17) of processor mode register 1 is set to “Waitcleared”, the Wait option can be either selected or cleared, chip select by chip select, by setting bits4 through 7 (CS0W through CS3W) of the chip select control register. Figures 5.5.3 through 5.5.5show relation of processor mode and the wait bit (PM17, CSiW).In case of M30620MASingle-chip mode(When, PM17 = “0”)Single-chip mode(When, PM17 = “1”)0000016SFR areaBCLK X 20000016SFR areaBCLK X 20040016Internal RAM areaBCLK X 10040016Internal RAM areaBCLK X 202C001602C0016E800016E800016Internal ROM areaBCLK X 1Internal ROM areaBCLK X 2FFFFF16FFFFF16Figure 5.5.3. Relation of processor mode and the wait bit (PM17, CSiW) (1)534