M16C User Manual.pdf

Clock-Synchronous Serial I/OMitsubishi microcomputersM16C / 62 GroupSINGLE-CHIP 16-BIT CMOS MICROCOMPUTER2.4.2 Operation of Serial I/O (transmission in clock-synchronous serial I/O mode)In transmitting data in clock-synchronous serial I/O mode, choose functions from those listed in Table2.4.1. Operations of the circled items are described below. Figure 2.4.7 shows the operation timing, andFigures 2.4.8 and 2.4.9 show the set-up procedures.Table 2.4.1. Choosed functionsItemSet-upItemSet-upTransfer clocksourceCTS functionCLK polarityOOOInternal clock (f1 / f8 / f32)External clock (CLKi pin)CTS function enabledCTS function disabledOutput transmission data atthe falling edge of thetransfer clockOutput transmission data atthe rising edge of thetransfer clockTransmissioninterrupt factorOutput transfer clockto multiple pins(Note 1)CTS / RTSseparation function(Note 2)Data logic selectfunction(Note 3)Transmission buffer emptyTransmission completeNot selectedSelectedPin shared by CTS and RTSCTS and RTS separatedTransfer clock O LSB firstTXD, RXD I/O O No reversepolarity reverse bitMSB first(Note 3)ReverseNote 1: This can be selected only when UART1 is used in combination with the internal clock. When this function is_______ ______________ _______selected, neither UART1 CTS/RTS function, nor UART0 CTS/RTS separation function can be utilized. Set the_______ _______UART1 CTS/RTS disable bit to “1”._______ _______Note 2: UART0 only. (UART1 CTS/RTS function cannot be used when this function is selected.)Note 3: UART2 only.OOOONo reverseReverseOperation(1) Setting the transmit enable bit to “1” and writing transmission data to the UARTi transmitbuffer register makes data transmissible status ready._______________(2) When input to the CTSi pin goes to “L” level, transmission starts (the CTSi pin must becontrolled on the reception side).(3) In synchronization with the first falling edge of the transfer clock, transmission data held in theUARTi transmit buffer register is transmitted to the UARTi transmit register. At this time, theUARTi transmit interrupt request bit goes to “1”. Also, the first bit of the transmission data istransmitted from the TxDi pin. Then the data is transmitted bit by bit from the lower order insynchronization with the falling edges.(4) When transmission of 1-byte data is completed, the transmit register empty flag goes to “1”,which indicates that transmission is completed. The transfer clock stops at “H” level.(5) If the next transmission data is set in the UARTi transmit buffer register while transmission isin progress (before the eighth bit has been transmitted), the data is transmitted in succession.334