M16C User Manual.pdf

DMACMitsubishi microcomputersM16C / 62 GroupSINGLE-CHIP 16-BIT CMOS MICROCOMPUTER(1) 8-bit transfers16-bit transfers from even address and the source address is even.BCLKAddressbusCPU useSourceDestinationDummycycleCPU useRD signalWR signalDatabusCPU useSourceDestinationDummycycleCPU use(2) 16-bit transfers and the source address is oddTransferring 16-bit data on an 8-bit data bus (In this case, there are also two destination write cycles).BCLKAddressbusCPU useSourceSource + 1DestinationDummycycleCPU useRD signalWR signalDatabusCPU useSourceSource + 1DestinationDummycycleCPU use(3) One wait is inserted into the source read under the conditions in (1)BCLKAddressbusCPU useSourceDestinationDummycycleCPU useRD signalWR signalDatabusCPU useSourceDestinationDummycycleCPU use(4) One wait is inserted into the source read under the conditions in (2)(When 16-bit data is transferred on an 8-bit data bus, there are two destination write cycles).BCLKAddressbusCPU useSourceSource + 1DestinationDummycycleCPU useRD signalWR signalDatabusDummyCPU use SourceSource + 1 DestinationCPU usecycleNote: The same timing changes occur with the respective conditions at the destination as at the source.Figure 1.16.5. Example of the transfer cycles for a source read79