M16C User Manual.pdf

Clock-Synchronous Serial I/OMitsubishi microcomputersM16C / 62 GroupSINGLE-CHIP 16-BIT CMOS MICROCOMPUTER2.4.3 Operation of the Serial I/O (transmission in clock-synchronous serial I/Omode, transfer clock output from multiple pins function selected)In transmitting data in clock-synchronous serial I/O mode, choose functions from those listed in Table2.4.2. Operations of the circled items are described below. Figure 2.4.10 shows the operation timing, andFigures 2.4.11 and 2.4.12 show the set-up procedures.Table 2.4.2. Choosed functionsItemSet-upItemSet-upTransfer clocksourceOInternal clock (f1 / f8 / f32)External clock (CLKi pin)Transmissioninterrupt factorOTransmission buffer emptyTransmission completeCTS functionOCTS function enabledCTS function disabledOutput transfer clockto multiple pins(Note 1)ONot selectedSelectedCLK polarityOOutput transmission data atthe falling edge of thetransfer clockCTS / RTSseparation function(Note 2)OPin shared by CTS and RTSCTS and RTS separatedOutput transmission data atthe rising edge of thetransfer clockData logic selectfunction(Note 3)ONo reverseReverseTransfer clockOLSB firstMSB firstTXD, RXD I/Opolarity reverse bit(Note 3)ONo reverseReverseNote 1: This can be selected only when UART1 is used in combination with the internal clock. When this function is_______ ______________ _______selected, neither UART1 CTS/RTS function, nor UART0 CTS/RTS separation function can be utilized. Set the_______ _______UART1 CTS/RTS disable bit to “1”._______ _______Note 2: UART0 only. (UART1 CTS/RTS function cannot be used when this function is selected.)Note 3: UART2 only.Operation(1) Setting the transmit enable bit to “1” makes data transmissible status ready.(2) When transmission data is written to the UART1 transmit buffer register, transmission dataheld in the UART1 transmit buffer register is transmitted to the UART1 transmit register insynchronization with the first falling edge of the transfer clock. At this time, the first bit of thetransmission data is transmitted from the TxD1 pin. Then the data is transmitted bit by bitfrom the lower order in synchronization with the falling edges of the transfer clock.(3) When transmission of 1-byte data is completed, the transmit register empty flag goes to “1”,which indicates that the transmission is completed. The transfer clock stops at “H” level. Atthis time, the UART1 transmit interrupt request bit goes to “1”.(4) Setting CLK/CLKS select bit 1 to “1” and setting CLK/CLKS select bit 0 to “1” causes theCLKS1 pin to go to the transfer clock output pin. Change the transfer clock output pin whentransmission is halted.338