M16C User Manual.pdf

Clock-Synchronous Serial I/OMitsubishi microcomputersM16C / 62 GroupSINGLE-CHIP 16-BIT CMOS MICROCOMPUTERSetting UARTi transmit/receive mode register (i=0 to 2)b70 0 0b00 1UART0 transmit/receive mode registerU0MR [Address 03A016]UART1 transmit/receive mode registerU1MR [Address 03A816]b70 0 0b00 1UART2 transmit/receive mode registerU2MR [Address 037816]Must be fixed to “001”Must be fixed to “001”Internal/external clock select bit0 : Internal clockInvalid in clock synchronous I/O modeInvalid in clock synchronous I/O modeInvalid in clock synchronous I/O modeSleep select bitMust be “0” in clock synchronous I/O modeInternal/external clock select bit0 : Internal clockInvalid in clock synchronous I/O modeInvalid in clock synchronous I/O modeInvalid in clock synchronous I/O modeTXD, RXD I/O polarity reverse bitUsually set to “0”Setting UARTi transmit/receive control register 0 (i=0 to 2)b70 00 0b0UART0 transmit/receive control register 0U0C0 [Address 03A416]UART1 transmit/receive control register 0U1C0 [Address 03AC16]BRG count source select bitb1 b00 0 : f1 is selected0 1 : f8 is selected1 0 : f32 is selected1 1 : InhibitedCTS/RTS function select bit(Valid when bit 4 = “0”)0 : CTS function is selected (Note)Transmit register empty flag0 : Data present in transmit register(during transmission)1 : No data present in transmit register(transmission completed)CTS/RTS disable bit0 : CTS/RTS function enabledData output select bit0 : TxDi pin is CMOS output1 : TxDi pin is N-channel open-drain outputCLK polarity select bit0 : Transmission data is output at falling edgeof transfer clock and reception data is inputat rising edgeTransfer format select bit0 : LSB firstb70 00 0b0UART2 transmit/receive control register 0U2C0 [Address 037C16]BRG count source select bitb1 b00 0 : f1 is selected0 1 : f8 is selected1 0 : f32 is selected1 1 : InhibitedCTS/RTS function select bit(Valid when bit 4 = “0”)0 : CTS function is selected (Note)Transmit register empty flag0 : Data present in transmit register(during transmission)1 : No data present in transmit register(transmission completed)CTS/RTS disable bit0 : CTS/RTS function enabledCLK polarity select bit0 : Transmission data is output at falling edgeof transfer clock and reception data is inputat rising edgeTransfer format select bit0 : LSB firstNote: Set the corresponding port direction register to “0” .Setting UART transmit/receive control register 2 and UART2 transmit/receive control register 1b70 0b00 0UART transmit/receive control register 2UCON [Address 03B016]b70 0b0UART2 transmit/receive control register 1U2C1 [Address 037D16]UART0 transmit interrupt cause select bit0 : Transmit buffer empty (Tl = 1)UART2 transmit interrupt cause select bit0 : Transmit buffer empty (Tl = 1)UART1 transmit interrupt cause select bit0 : Transmit buffer empty (Tl = 1)Valid when bit 5 = “1”CLK/CLKS select bit 10 : Normal mode (CLK output is CLK1 only)Data logic select bit0 : No reverseError signal output enable bitMust be “0” in clock synchronous I/O modeSeparate CTS/RTS bit0 : CTS/RTS shared pinContinued to the next pageFigure 2.4.8. Set-up procedure of transmission in clock-synchronous serial I/O mode (1)336