M16C User Manual.pdf

Controlling Power ApplicationsMitsubishi microcomputersM16C / 62 GroupSINGLE-CHIP 16-BIT CMOS MICROCOMPUTERMainInitial conditionb7 b0 Pull-up control register 21[Address 03FE16]PUR2P104 to P107 pulled highb70000111b0 Port P10 direction register1 [Address 03F616]PD10Key scan output portb7000b00Port P10 register[Address 03F416]P10Key scan datab700b01Key scan input portKey input interrupt control register[Address 004D16]KUPICInterrupt priority level select bitSet higher value than the present IPLInterrupt enable level (IPL) = 0Interrupt enable flag (I) =0Setting interrupt except stop mode cancelb7Interrupt control register TBiIC(i=3 to 5) [Address 004516 to 004716]BCNIC [Address 004A16]DMiIC(i=0, 1) [Address 004B16, 004C16]ADIC [Address 004E16]SiTIC(i=0 to 2) [Address 005116, 005316, 004F16]SiRIC(i=0 to 2) [Address 005216, 005416, 005016]b00 0 0TAiIC(i=0 to 4) [Address 005516 to 005916]TBiIC(i=0 to 2) [Address 005A16 to 005C16]Interrupt priority level select bit000 : Interrupt disabledb70b00 0 0 INTiIC(i=0 to 2) [Address 005D16 to 005F16]Interrupt priority level select bit000 : Interrupt disabledAlways set to “0”Canceling protectb7b01Protect register [Address 000A16]PRCREnables writing to system clock control registers 0 and 1(addresses 000616 and 000716)1 : Write-enabledSetting operation clock after returning from stop mode(When operating with XIN after returning)b70 0b0System clock control register 0[Address 000616]CM0Main clock (XIN-XOUT) stop bitOnSystem clock select bitXIN, XOUTAs this register becomes setting mentioned above whenoperating with XIN (count source of BCLK is XIN),the user does not need to set it again.(When operating with XCIN after returning)b71 1b0System clock control register 0[Address 000616]CM0Port XC select bitXCIN-XCOUT generationSystem clock select bitXCIN, XCOUTAs this register becomes setting mentioned above when operating with XCIN(count source of BCLK is XCIN), the user does not need to set it again.When operating with XIN, set port Xc select bit to “1” before setting systemclock select bit to “1”. The both bits cannot be set at the same time.Interrupt enable flag (I flag) “1”All clocks off (stop mode)b70 0 0 0b01System clock control register 1 [Address 000716]CM1All clock stop control bit1 : All clocks off (stop mode)Reserved bitAlways set to “0”NOP instruction X 5Key input interrupt request generationFigure 3.7.3. Set-up procedure of controlling power using stop mode (1)478