21.07.2015 Views

M16C User Manual.pdf

M16C User Manual.pdf

M16C User Manual.pdf

SHOW MORE
SHOW LESS

Create successful ePaper yourself

Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.

External BusesMitsubishi microcomputers<strong>M16C</strong> / 62 GroupSINGLE-CHIP 16-BIT CMOS MICROCOMPUTERChip select control registerb7 b6 b5 b4 b3 b2 b1 b0Symbol Address When resetCSR 000816 0116Bit symbolCS0CS1CS2CS3CS0WCS1WCS2WCS3WBit nameCS0 output enable bitCS1 output enable bitCS2 output enable bitCS3 output enable bitCS0 wait bitCS1 wait bitCS2 wait bitCS3 wait bitFunction0 : Chip select output disabled(Normal port pin)1 : Chip select output enabled0 : Wait state inserted1 : No wait stateR W Figure 5.2.3. Chip select control register5.2.3 Bus TypesThe <strong>M16C</strong>/62 Group has two types of buses: a separate bus where separate pins are used for addressoutput and data input/output and a multiplexed bus where pins are time- multiplexed and switched betweenaddress output and data input/output to save the number of pins used.A separate bus is used to access devices such as ROM and RAM which have separate buses. The areasaccessed via separate buses can be allocated for programs and data.A multiplexed bus is used to access devices such as ASSPs which have multiplexed buses. The areasaccessed via a multiplexed bus can only be allocated for data. Programs cannot be located in these areas.The area accessed via a multiplex bus can be selected from three types of area CS2 area, CS1 area, andentire space by setting the multiplexed bus select bits (bits 4 and 5) of the processor mode register 0 (address000416). However, the entire space cannot be selected when operating in the microprocessor mode.Areas not accessed via multiplexed bus are accessed through separate buses._____________When accessing an area set for access via a multiplexed bus the data bus is 8 bits wide, the data bus D0to D7 is multiplexed with address bus A0 to A7.If the data bus is 16 bits wide, the data bus D0 to D7 is multiplexed with address bus A1 to A8. In eithercase, the bus is switched between data and address separated only in time.In the latter case, however, the addresses of connected devices are mapped into even addresses (everyother addresses) of the <strong>M16C</strong>/62. Therefore, be sure to access the <strong>M16C</strong>/62's even addresses in lengthof bytes when accessing a connected device.5.2.4 R/W ModesThe read/write signal that is output when accessing an external area can be selected between the RD/_______ ___________ _________ ________BHE/WR and the RD/WRH/WRL modes by setting the R/W mode select bit (bit 2) of the processor mode_____ ________ ___________ _________register 0 (address 000416). Use the RD/BHE/WR mode to access a 16-bit wide RAM and the RD/WRH/________WRL mode to access an 8-bit wide RAM._____ ________ ______When the <strong>M16C</strong>/62 is reset, the RD/BHE/WR mode is selected by default. To switch over the R/W mode,_____ ________ ___________ _________ ________change the RD/BHE/WR to the RD/WRH/WRL mode before accessing an external RAM._____ ________ ______ _____ _________ ________Refer to the connection examples of RD/BHE/WR and RD/WRH/WRL shown in Section 5.4, "ConnectionExamples."_____511

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!