M16C User Manual.pdf

Address Match InterruptMitsubishi microcomputersM16C / 62 GroupSINGLE-CHIP 16-BIT CMOS MICROCOMPUTER2.12.2 Operation of Address Match InterruptThe following is an operation of address match interrupt. Figure 2.12.4 shows the set-up procedure ofaddress match interrupt, and Figure 2.12.5 shows the overview of the address match interrupt handlingroutine.Operation (1) The address match interrupt handling routine sets an address to be used to cause the addressmatch interrupt register to generate an interrupt.(2) Setting the address match enable flag to “1” enables an interrupt to occur.(3) An address match interrupt occurs immediately before the instruction in the address indicatedby the address match interrupt register as a program is executed.Setting address match interrupt register(b23)b7(b20) (b19)b4 b3(b16) (b15)b0 b7Address match interrupt register 0 [Address 001216 to 001016]RMAD0Address match interrupt register 1 [Address 001616 to 001416]RMAD1(b8)b0 b7b0Can be set to “0000016” to “FFFFF16”Setting address match interrupt enable registerb7b0Address match interrupt enable register [Address 000916]AIERAddress match interrupt 0 enable bit1: Interrupt enabledAddress match interrupt 1 enable bit1: Interrupt enabledFigure 2.12.4. Set-up procedure of address match interrupt432